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Message-ID: <Z0VKZ+AxQdcnaEax@intel.com>
Date: Tue, 26 Nov 2024 12:11:19 +0800
From: Zhao Liu <zhao1.liu@...el.com>
To: Dave Hansen <dave.hansen@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org, tglx@...utronix.de,
	bp@...en8.de, rafael@...nel.org, lenb@...nel.org,
	dave.jiang@...el.com, irenic.rajneesh@...il.com,
	david.e.box@...el.com
Subject: Re: [PATCH 05/11] x86/cpu: Refresh DCA leaf reading code

On Wed, Nov 20, 2024 at 11:53:34AM -0800, Dave Hansen wrote:
> Date: Wed, 20 Nov 2024 11:53:34 -0800
> From: Dave Hansen <dave.hansen@...ux.intel.com>
> Subject: [PATCH 05/11] x86/cpu: Refresh DCA leaf reading code
> 
> 
> From: Dave Hansen <dave.hansen@...ux.intel.com>
> 
> The DCA leaf number is also hard-coded in the CPUID level dependency
> table. Move its definition to common code and use it.
> 
> While at it, fix up the naming and types in the probe code.  All
> CPUID data is provided in 32-bit registers, not 'unsigned long'.
> Also stop referring to "level_9".  Move away from test_bit()
> because the type is no longer an 'unsigned long'.
> 
> Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
> ---
> 
>  b/arch/x86/include/asm/cpuid.h |    3 ++-
>  b/arch/x86/kernel/cpu/common.c |    2 +-
>  b/drivers/dma/ioat/dca.c       |    8 +++++---
>  3 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff -puN arch/x86/include/asm/cpuid.h~dca-leaf-checks-1 arch/x86/include/asm/cpuid.h
> --- a/arch/x86/include/asm/cpuid.h~dca-leaf-checks-1	2024-11-20 11:44:17.721669887 -0800
> +++ b/arch/x86/include/asm/cpuid.h	2024-11-20 11:44:17.725670041 -0800
> @@ -19,7 +19,8 @@ enum cpuid_regs_idx {
>  	CPUID_EDX,
>  };
>  
> -#define CPUID_MWAIT_LEAF		5
> +#define CPUID_MWAIT_LEAF	0x5

Nit, this change can be merged into patch 1?

Otherwise,

Reviewed-by: Zhao Liu <zhao1.liu@...el.com>


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