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Message-ID: <d004dfe7-d019-4f53-8373-c8c4e031748c@nxp.com>
Date: Tue, 26 Nov 2024 10:08:26 +0800
From: Liu Ying <victor.liu@....com>
To: Francesco Dolcini <francesco@...cini.it>
Cc: dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
 imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
 p.zabel@...gutronix.de, maarten.lankhorst@...ux.intel.com,
 mripard@...nel.org, tzimmermann@...e.de, airlied@...il.com, simona@...ll.ch,
 robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
 shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
 festevam@...il.com, glx@...utronix.de, vkoul@...nel.org, kishon@...nel.org,
 aisheng.dong@....com, agx@...xcpu.org, frank.li@....com,
 dmitry.baryshkov@...aro.org
Subject: Re: [DO NOT MERGE PATCH v4 16/19] arm64: dts: imx8qxp: Add display
 controller subsystem

On 11/25/2024, Francesco Dolcini wrote:
> On Mon, Nov 25, 2024 at 05:33:13PM +0800, Liu Ying wrote:
>> Add display controller subsystem in i.MX8qxp SoC.
>>
>> Signed-off-by: Liu Ying <victor.liu@....com>
> 
> ...
> 
>> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
>> index 05138326f0a5..35cc82cbbcd1 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
>> @@ -20,6 +20,27 @@ / {
>>  	#size-cells = <2>;
>>  
>>  	aliases {
>> +		dc0 = &dc0;
>> +		dc0-constframe0 = &dc0_constframe0;
>> +		dc0-constframe1 = &dc0_constframe1;
>> +		dc0-constframe4 = &dc0_constframe4;
>> +		dc0-constframe5 = &dc0_constframe5;
>> +		dc0-display-engine0 = &dc0_display_engine0;
>> +		dc0-display-engine1 = &dc0_display_engine1;
>> +		dc0-extdst0 = &dc0_extdst0;
>> +		dc0-extdst1 = &dc0_extdst1;
>> +		dc0-extdst4 = &dc0_extdst4;
>> +		dc0-extdst5 = &dc0_extdst5;
>> +		dc0-fetchlayer0 = &dc0_fetchlayer0;
>> +		dc0-fetchwarp2 = &dc0_fetchwarp2;
>> +		dc0-framegen0 = &dc0_framegen0;
>> +		dc0-framegen1 = &dc0_framegen1;
>> +		dc0-layerblend0 = &dc0_layerblend0;
>> +		dc0-layerblend1 = &dc0_layerblend1;
>> +		dc0-layerblend2 = &dc0_layerblend2;
>> +		dc0-layerblend3 = &dc0_layerblend3;
>> +		dc0-tcon0 = &dc0_tcon0;
>> +		dc0-tcon1 = &dc0_tcon1;
> 
> what would you use those aliases for?

They are used to get the instance numbers of display controller
and display controller's internal processing units from display
driver, e.g., patch 9 & 10 get instance numbers of some display
controller's internal processing units.

BTW, i.MX8QM SoC embeds two display controller subsystems while
i.MX8QXP SoC embeds only one. So, for i.MX8QM, there would be
dc0 and dc1 in aliases node.

> 
> Francesco
> 

-- 
Regards,
Liu Ying


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