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Message-ID: <875xo257rd.fsf@bootlin.com>
Date: Mon, 02 Dec 2024 18:12:22 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Hui-Ping Chen <hpchen0nvt@...il.com>
Cc: richard@....at,  vigneshr@...com,  robh@...nel.org,  krzk+dt@...nel.org,
  conor+dt@...nel.org,  nikita.shubin@...uefel.me,  arnd@...db.de,
  vkoul@...nel.org,  esben@...nix.com,
  linux-arm-kernel@...ts.infradead.org,  linux-mtd@...ts.infradead.org,
  devicetree@...r.kernel.org,  linux-kernel@...r.kernel.org
Subject: Re: [PATCH v9 2/2] mtd: rawnand: nuvoton: add new driver for the
 Nuvoton MA35 SoC

Hello,

> +static int ma35_nand_attach_chip(struct nand_chip *chip)
> +{
> +	struct ma35_nand_info *nand = nand_get_controller_data(chip);
> +	struct mtd_info *mtd = nand_to_mtd(chip);
> +	struct device *dev = mtd->dev.parent;
> +	u32 reg;
> +
> +	if (chip->options & NAND_BUSWIDTH_16) {
> +		dev_err(dev, "16 bits bus width not supported");
> +		return -EINVAL;
> +	}
> +
> +	reg = readl(nand->regs + MA35_NFI_REG_NANDCTL) & (~PSIZE_MASK);
> +	if (mtd->writesize == 2048)
> +		writel(reg | PSIZE_2K, nand->regs + MA35_NFI_REG_NANDCTL);
> +	else if (mtd->writesize == 4096)
> +		writel(reg | PSIZE_4K, nand->regs + MA35_NFI_REG_NANDCTL);
> +	else if (mtd->writesize == 8192)
> +		writel(reg | PSIZE_8K, nand->regs + MA35_NFI_REG_NANDCTL);

You should error out if the writesize is not supported.

Thanks,
Miquèl

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