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Message-ID: <6395117f-4ed8-45b5-ba80-417d61beb55b@gmail.com>
Date: Tue, 3 Dec 2024 08:27:04 +0800
From: Hui-Ping Chen <hpchen0nvt@...il.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>
Cc: richard@....at, vigneshr@...com, robh@...nel.org, krzk+dt@...nel.org,
conor+dt@...nel.org, nikita.shubin@...uefel.me, arnd@...db.de,
vkoul@...nel.org, esben@...nix.com, linux-arm-kernel@...ts.infradead.org,
linux-mtd@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v9 2/2] mtd: rawnand: nuvoton: add new driver for the
Nuvoton MA35 SoC
Dear Mique,
Thank you for your reply.
On 2024/12/3 上午 01:12, Miquel Raynal wrote:
> Hello,
>
>> +static int ma35_nand_attach_chip(struct nand_chip *chip)
>> +{
>> + struct ma35_nand_info *nand = nand_get_controller_data(chip);
>> + struct mtd_info *mtd = nand_to_mtd(chip);
>> + struct device *dev = mtd->dev.parent;
>> + u32 reg;
>> +
>> + if (chip->options & NAND_BUSWIDTH_16) {
>> + dev_err(dev, "16 bits bus width not supported");
>> + return -EINVAL;
>> + }
>> +
>> + reg = readl(nand->regs + MA35_NFI_REG_NANDCTL) & (~PSIZE_MASK);
>> + if (mtd->writesize == 2048)
>> + writel(reg | PSIZE_2K, nand->regs + MA35_NFI_REG_NANDCTL);
>> + else if (mtd->writesize == 4096)
>> + writel(reg | PSIZE_4K, nand->regs + MA35_NFI_REG_NANDCTL);
>> + else if (mtd->writesize == 8192)
>> + writel(reg | PSIZE_8K, nand->regs + MA35_NFI_REG_NANDCTL);
> You should error out if the writesize is not supported.
Okay. I will return -EINVAL if the writesize is not supported.
>
> Thanks,
> Miquèl
Best regards,
Hui-Ping Chen
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