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Message-ID: <8d08c539-6abf-4def-890f-e54176f26efc@quicinc.com>
Date: Mon, 2 Dec 2024 13:06:58 +0530
From: Taniya Das <quic_tdas@...cinc.com>
To: Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Bjorn Andersson
<andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
"Stephen
Boyd" <sboyd@...nel.org>,
Abhishek Sahu <absahu@...eaurora.org>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon
<will@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik
<quic_imrashai@...cinc.com>,
Jagadeesh Kona <quic_jkona@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v3 10/11] clk: qcom: videocc-qcs615: Add QCS615 video
clock controller driver
On 11/9/2024 10:52 PM, Bryan O'Donoghue wrote:
> On 08/11/2024 04:09, Taniya Das wrote:
>> +static struct gdsc vcodec0_gdsc = {
>> + .gdscr = 0x874,
>> + .en_rest_wait_val = 0x2,
>> + .en_few_wait_val = 0x2,
>> + .clk_dis_wait_val = 0x6,
>> + .pd = {
>> + .name = "vcodec0_gdsc",
>> + },
>> + .pwrsts = PWRSTS_OFF_ON,
>> + .flags = HW_CTRL_TRIGGER | POLL_CFG_GDSCR,
>> +};
>> +
>> +static struct gdsc venus_gdsc = {
>> + .gdscr = 0x814,
>> + .en_rest_wait_val = 0x2,
>> + .en_few_wait_val = 0x2,
>> + .clk_dis_wait_val = 0x6,
>> + .pd = {
>> + .name = "venus_gdsc",
>> + },
>> + .pwrsts = PWRSTS_OFF_ON,
>> + .flags = POLL_CFG_GDSCR,
>> +};
>> +
>
> This looks good to me, except; could you please check if venus gdsc
> should be the parent of vcodec0.
For the video gdscs we generally do not explicitly need to mention the
parent GDSC.
--
Thanks & Regards,
Taniya Das.
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