linux-kernel - Re: [PATCH v7 01/12] Documentation: x86: Add AMD Hardware Feedback Interface documentation

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Message-ID: <20241202114513.GD8562@noisy.programming.kicks-ass.net>
Date: Mon, 2 Dec 2024 12:45:13 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Mario Limonciello <mario.limonciello@....com>
Cc: Borislav Petkov <bp@...en8.de>, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
	"H . Peter Anvin" <hpa@...or.com>,
	"Rafael J . Wysocki" <rafael@...nel.org>,
	"Gautham R . Shenoy" <gautham.shenoy@....com>,
	Perry Yuan <perry.yuan@....com>,
	Brijesh Singh <brijesh.singh@....com>,
	Li RongQing <lirongqing@...du.com>,
	"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <linux-kernel@...r.kernel.org>,
	"open list:ACPI" <linux-acpi@...r.kernel.org>,
	"open list:AMD PSTATE DRIVER" <linux-pm@...r.kernel.org>,
	Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
	Bagas Sanjaya <bagasdotme@...il.com>
Subject: Re: [PATCH v7 01/12] Documentation: x86: Add AMD Hardware Feedback
 Interface documentation

On Sat, Nov 30, 2024 at 08:06:52AM -0600, Mario Limonciello wrote:

> +Thread Classification and Ranking Table Interaction
> +----------------------------------------------------
> +
> +The thread classification is used to select into a ranking table that describes
> +an efficiency and performance ranking for each classification.
> +
> +Threads are classified during runtime into enumerated classes. The classes represent
> +thread performance/power characteristics that may benefit from special scheduling behaviors.
> +The below table depicts an example of thread classification and a preference where a given thread
> +should be scheduled based on its thread class. The real time thread classification is consumed
> +by the operating system and is used to inform the scheduler of where the thread should be placed.
> +
> +Thread Classification Example Table
> +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> ++----------+----------------+-------------------------------+---------------------+---------+
> +| class ID | Classification | Preferred scheduling behavior | Preemption priority | Counter |
> ++----------+----------------+-------------------------------+---------------------+---------+
> +| 0        | Default        | Performant                    | Highest             |         |
> ++----------+----------------+-------------------------------+---------------------+---------+
> +| 1        | Non-scalable   | Efficient                     | Lowest              | PMCx1A1 |
> ++----------+----------------+-------------------------------+---------------------+---------+
> +| 2        | I/O bound      | Efficient                     | Lowest              | PMCx044 |
> ++----------+----------------+-------------------------------+---------------------+---------+
> +
> +Thread classification is performed by the hardware each time that the thread is switched out.
> +Threads that don't meet any hardware specified criteria will be classified as "default".

I'm not seeing this part in the patches, am I needing to read more
careful?