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Message-ID: <293b507c-c442-4bd2-b525-dc1a6343acc7@quicinc.com>
Date: Mon, 2 Dec 2024 18:57:41 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Stephan Gerhold <stephan.gerhold@...aro.org>,
Rob Clark
<robdclark@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
CC: Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona
Vetter <simona@...ll.ch>,
Abel Vesa <abel.vesa@...aro.org>, <linux-arm-msm@...r.kernel.org>,
<dri-devel@...ts.freedesktop.org>, <freedreno@...ts.freedesktop.org>,
<linux-kernel@...r.kernel.org>, Johan
Hovold <johan@...nel.org>,
<stable@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/dpu: fix x1e80100 intf_6 underrun/vsync interrupt
On 11/15/2024 4:55 AM, Stephan Gerhold wrote:
> The IRQ indexes for the intf_6 underrun/vsync interrupts are swapped.
> DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16) is the actual underrun interrupt and
> DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17) is the vsync interrupt.
>
> This causes timeout errors when using the DP2 controller, e.g.
> [dpu error]enc37 frame done timeout
> *ERROR* irq timeout id=37, intf_mode=INTF_MODE_VIDEO intf=6 wb=-1, pp=2, intr=0
> *ERROR* wait disable failed: id:37 intf:6 ret:-110
>
> Correct them to fix these errors and make DP2 work properly.
>
> Cc: stable@...r.kernel.org
> Fixes: e3b1f369db5a ("drm/msm/dpu: Add X1E80100 support")
> Signed-off-by: Stephan Gerhold <stephan.gerhold@...aro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Thanks for fixing this, good catch !
Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
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