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Message-ID:
 <LV3PR12MB92606EADDE78383521D359B9E2372@LV3PR12MB9260.namprd12.prod.outlook.com>
Date: Wed, 4 Dec 2024 20:09:51 +0000
From: "Thangaraj, Senthil Nathan" <SenthilNathan.Thangaraj@....com>
To: "Trivedi Manojbhai, Naman" <Naman.TrivediManojbhai@....com>,
	"robh@...nel.org" <robh@...nel.org>, "Simek, Michal" <michal.simek@....com>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>, "conor+dt@...nel.org"
	<conor+dt@...nel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, "linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v2] arm64: zynqmp: add clock-output-names property in
 clock nodes

> -----Original Message-----
> From: Naman Trivedi <naman.trivedimanojbhai@....com>
> Sent: Friday, November 22, 2024 1:57 AM
> To: robh@...nel.org; Simek, Michal <michal.simek@....com>;
> krzk+dt@...nel.org; conor+dt@...nel.org; devicetree@...r.kernel.org; linux-arm-
> kernel@...ts.infradead.org; Thangaraj, Senthil Nathan
> <SenthilNathan.Thangaraj@....com>
> Cc: linux-kernel@...r.kernel.org
> Subject: [PATCH v2] arm64: zynqmp: add clock-output-names property in clock
> nodes
> 
> Add clock-output-names property to clock nodes, so that the resulting clock name
> do not change when clock node name is changed.
> Also, replace underscores with hyphens in the clock node names as per dt-schema
> rule.
> 
> Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@....com>
> ---
> v1: https://lore.kernel.org/all/c5d6effa-bdcf-49e3-a4bf-3713db889b70@kernel.org
> Changes v1 -> v2:
> - Fix the clock node names by replacing underscore with hyphen.
> ---
>  arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 15 ++++++++++-----
>  1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> index 60d1b1acf9a0..385fed8a852a 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> @@ -10,39 +10,44 @@
> 
>  #include <dt-bindings/clock/xlnx-zynqmp-clk.h>
>  / {
> -	pss_ref_clk: pss_ref_clk {
> +	pss_ref_clk: pss-ref-clk {
>  		bootph-all;
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
>  		clock-frequency = <33333333>;
> +		clock-output-names = "pss_ref_clk";
>  	};
> 
> -	video_clk: video_clk {
> +	video_clk: video-clk {
>  		bootph-all;
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
>  		clock-frequency = <27000000>;
> +		clock-output-names = "video_clk";
>  	};
> 
> -	pss_alt_ref_clk: pss_alt_ref_clk {
> +	pss_alt_ref_clk: pss-alt-ref-clk {
>  		bootph-all;
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
>  		clock-frequency = <0>;
> +		clock-output-names = "pss_alt_ref_clk";
>  	};
> 
> -	gt_crx_ref_clk: gt_crx_ref_clk {
> +	gt_crx_ref_clk: gt-crx-ref-clk {
>  		bootph-all;
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
>  		clock-frequency = <108000000>;
> +		clock-output-names = "gt_crx_ref_clk";
>  	};
> 
> -	aux_ref_clk: aux_ref_clk {
> +	aux_ref_clk: aux-ref-clk {
>  		bootph-all;
>  		compatible = "fixed-clock";
>  		#clock-cells = <0>;
>  		clock-frequency = <27000000>;
> +		clock-output-names = "aux_ref_clk";
>  	};
>  };
> 
> --
> 2.25.1

Acked-by: Senthil Nathan Thangaraj <senthilnathan.thangaraj@....com>

Thanks,
Senthil


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