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Message-ID: <20241205231207.ywcruocjqtyjsvxx@jpoimboe>
Date: Thu, 5 Dec 2024 15:12:07 -0800
From: Josh Poimboeuf <jpoimboe@...nel.org>
To: Borislav Petkov <bp@...en8.de>
Cc: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org, amit@...nel.org, kvm@...r.kernel.org,
	amit.shah@....com, thomas.lendacky@....com, tglx@...utronix.de,
	peterz@...radead.org, corbet@....net, mingo@...hat.com,
	dave.hansen@...ux.intel.com, hpa@...or.com, seanjc@...gle.com,
	pbonzini@...hat.com, daniel.sneddon@...ux.intel.com,
	kai.huang@...el.com, sandipan.das@....com,
	boris.ostrovsky@...cle.com, Babu.Moger@....com,
	david.kaplan@....com, dwmw@...zon.co.uk, andrew.cooper3@...rix.com
Subject: Re: [PATCH v2 1/2] x86/bugs: Don't fill RSB on VMEXIT with
 eIBRS+retpoline

On Tue, Dec 03, 2024 at 12:20:15PM +0100, Borislav Petkov wrote:
> On Mon, Dec 02, 2024 at 03:35:21PM -0800, Pawan Gupta wrote:
> > It is in this doc:
> > 
> >   https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/indirect-branch-restricted-speculation.html
> > 
> 
> I hope those URLs remain more stable than past experience shows.
> 
> >   "Processors with enhanced IBRS still support the usage model where IBRS is
> >   set only in the OS/VMM for OSes that enable SMEP. To do this, such
> >   processors will ensure that guest behavior cannot control the RSB after a
> >   VM exit once IBRS is set, even if IBRS was not set at the time of the VM
> >   exit."
> 
> ACK, thanks.
> 
> Now, can we pls add those excerpts to Documentation/ and point to them from
> the code so that it is crystal clear why it is ok?

Ok, I'll try to write up a document.  I'm thinking it should go in its
own return-based-attacks.rst file rather than spectre.rst, which is more
of an outdated historical document at this point.  And we want this
document to actually be read (and kept up to date) by developers instead
of mostly ignored like the others.

-- 
Josh

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