lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20241209161427.3580256-2-Tarun.Alle@microchip.com>
Date: Mon, 9 Dec 2024 21:44:26 +0530
From: Tarun Alle <Tarun.Alle@...rochip.com>
To: <arun.ramadoss@...rochip.com>, <UNGLinuxDriver@...rochip.com>,
	<andrew@...n.ch>, <hkallweit1@...il.com>, <linux@...linux.org.uk>,
	<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH net-next 1/2] net: phy: phy-c45: Auto-negotiaion changes for T1 phy in phy library

Below auto-negotiation library changes required for T1 phys:
- Lower byte advertisement register need to read after higher byte as
  per 802.3-2022 : Section 45.2.7.22.
- Link status need to be get from control T1 registers for T1 phys.

Signed-off-by: Tarun Alle <Tarun.Alle@...rochip.com>
---
 drivers/net/phy/phy-c45.c | 36 ++++++++++++++++++++++++++----------
 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c
index 0dac08e85304..85d8a9b9c3f6 100644
--- a/drivers/net/phy/phy-c45.c
+++ b/drivers/net/phy/phy-c45.c
@@ -234,15 +234,11 @@ static int genphy_c45_baset1_an_config_aneg(struct phy_device *phydev)
 		return -EOPNOTSUPP;
 	}
 
-	adv_l |= linkmode_adv_to_mii_t1_adv_l_t(phydev->advertising);
-
-	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_L,
-				     adv_l_mask, adv_l);
-	if (ret < 0)
-		return ret;
-	if (ret > 0)
-		changed = 1;
-
+	/* Ref. 802.3-2022 : Section 45.2.7.22
+	 * The Base Page value is transferred to mr_adv_ability when register
+	 * 7.514 is written.
+	 * Therefore, registers 7.515 and 7.516 should be written before 7.514.
+	 */
 	adv_m |= linkmode_adv_to_mii_t1_adv_m_t(phydev->advertising);
 
 	ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_M,
@@ -252,6 +248,23 @@ static int genphy_c45_baset1_an_config_aneg(struct phy_device *phydev)
 	if (ret > 0)
 		changed = 1;
 
+	adv_l |= linkmode_adv_to_mii_t1_adv_l_t(phydev->advertising);
+
+	if (changed) {
+		ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_ADV_L,
+				    adv_l);
+		if (ret < 0)
+			return ret;
+	} else {
+		ret = phy_modify_mmd_changed(phydev, MDIO_MMD_AN,
+					     MDIO_AN_T1_ADV_L,
+					     adv_l_mask, adv_l);
+		if (ret < 0)
+			return ret;
+		if (ret > 0)
+			changed = 1;
+	}
+
 	return changed;
 }
 
@@ -418,11 +431,14 @@ EXPORT_SYMBOL_GPL(genphy_c45_aneg_done);
 int genphy_c45_read_link(struct phy_device *phydev)
 {
 	u32 mmd_mask = MDIO_DEVS_PMAPMD;
+	u16 reg = MDIO_CTRL1;
 	int val, devad;
 	bool link = true;
 
 	if (phydev->c45_ids.mmds_present & MDIO_DEVS_AN) {
-		val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1);
+		if (genphy_c45_baset1_able(phydev))
+			reg = MDIO_AN_T1_CTRL;
+		val = phy_read_mmd(phydev, MDIO_MMD_AN, reg);
 		if (val < 0)
 			return val;
 
-- 
2.34.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ