lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <677251eb-d3c3-48e1-ba79-fb8ec1e29c6f@quicinc.com>
Date: Mon, 9 Dec 2024 15:56:13 +0800
From: Xin Liu <quic_liuxin@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Manivannan Sadhasivam
	<manivannan.sadhasivam@...aro.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
CC: Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
        Alim Akhtar <alim.akhtar@...sung.com>,
        Avri Altman <avri.altman@....com>,
        Bart Van Assche <bvanassche@....org>, Andy Gross <agross@...nel.org>,
        <linux-arm-msm@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-scsi@...r.kernel.org>, <quic_jiegan@...cinc.com>,
        <quic_aiquny@...cinc.com>, <quic_tingweiz@...cinc.com>,
        <quic_sayalil@...cinc.com>
Subject: Re: [PATCH v3 2/3] arm64: dts: qcom: qcs615: add UFS node



在 2024/12/6 5:21, Konrad Dybcio 写道:
> On 22.11.2024 7:44 AM, Xin Liu wrote:
>> From: Sayali Lokhande <quic_sayalil@...cinc.com>
>>
>> Add the UFS Host Controller node and its PHY for QCS615 SoC.
>>
>> Signed-off-by: Sayali Lokhande <quic_sayalil@...cinc.com>
>> Co-developed-by: Xin Liu <quic_liuxin@...cinc.com>
>> Signed-off-by: Xin Liu <quic_liuxin@...cinc.com>
>> ---
> 
> [...]
> 
>> +
>> +			operating-points-v2 = <&ufs_opp_table>;
>> +			interconnects = <&aggre1_noc MASTER_UFS_MEM QCOM_ICC_TAG_ALWAYS
>> +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
>> +					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
>> +					 &config_noc SLAVE_UFS_MEM_CFG QCOM_ICC_TAG_ALWAYS>;
> 
> QCOM_ICC_TAG_ACTIVE_ONLY for the cpu path
I need to ask you for advice. I have reviewed the ufs_mem_hc of many 
devices and found that all of them use QCOM_ICC_TAG_ALWAYS for their 
interconnects cpu path. Why do I need to use QCOM_ICC_TAG_ACTIVE_ONLY here?
> 
>> +			interconnect-names = "ufs-ddr",
>> +					     "cpu-ufs";
>> +
>> +			power-domains = <&gcc UFS_PHY_GDSC>;
>> +			required-opps = <&rpmhpd_opp_nom>;
> 
> this contradicts the levels in the OPP table:
The required-opps here corresponds to opp-200000000 in the opp_table 
below. Similarly, I referred to sm8550.dtsi, whose required-opps also 
corresponds to the opp table.
> 
>> +
>> +			iommus = <&apps_smmu 0x300 0x0>;
>> +			dma-coherent;
>> +
>> +			lanes-per-direction = <1>;
>> +
>> +			phys = <&ufs_mem_phy>;
>> +			phy-names = "ufsphy";
>> +
>> +			#reset-cells = <1>;
>> +
>> +			status = "disabled";
>> +
>> +			ufs_opp_table: opp-table {
>> +				compatible = "operating-points-v2";
>> +
>> +				opp-50000000 {
>> +					opp-hz = /bits/ 64 <50000000>,
>> +						 /bits/ 64 <0>,
>> +						 /bits/ 64 <0>,
>> +						 /bits/ 64 <37500000>,
>> +						 /bits/ 64 <75000000>,
>> +						 /bits/ 64 <0>,
>> +						 /bits/ 64 <0>,
>> +						 /bits/ 64 <0>;
>> +					required-opps = <&rpmhpd_opp_low_svs>;
>> +				};
>> +
> 
> Konrad


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ