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Message-ID: <9cb087c541607a89dd97791a0304887f7fd3a4ba.camel@linux.intel.com>
Date: Fri, 13 Dec 2024 13:07:21 -0800
From: Tim Chen <tim.c.chen@...ux.intel.com>
To: K Prateek Nayak <kprateek.nayak@....com>, Thomas Gleixner
 <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, Borislav Petkov
 <bp@...en8.de>, Dave Hansen <dave.hansen@...ux.intel.com>, Peter Zijlstra
 <peterz@...radead.org>, Juri Lelli <juri.lelli@...hat.com>, Vincent Guittot
 <vincent.guittot@...aro.org>, x86@...nel.org, linux-kernel@...r.kernel.org
Cc: "H. Peter Anvin" <hpa@...or.com>, Dietmar Eggemann
 <dietmar.eggemann@....com>, Steven Rostedt <rostedt@...dmis.org>, Ben
 Segall <bsegall@...gle.com>, Mel Gorman <mgorman@...e.de>, Valentin
 Schneider <vschneid@...hat.com>, "Rafael J. Wysocki"
 <rafael.j.wysocki@...el.com>,  Ricardo Neri
 <ricardo.neri-calderon@...ux.intel.com>, Mario Limonciello
 <mario.limonciello@....com>,  Meng Li <li.meng@....com>, Huang Rui
 <ray.huang@....com>, "Gautham R. Shenoy" <gautham.shenoy@....com>
Subject: Re: [PATCH 5/8] x86/topology: Use x86_sched_itmt_flags for PKG
 domain unconditionally

On Wed, 2024-12-11 at 18:55 +0000, K Prateek Nayak wrote:
> x86_sched_itmt_flags() returns SD_ASYM_PACKING if ITMT support is
> enabled by the system. Without ITMT support being enabled, it returns 0
> similar to current x86_die_flags() on non-Hybrid systems
> (!X86_HYBRID_CPU and !X86_FEATURE_AMD_HETEROGENEOUS_CORES)
> 
> On Intel systems that enable ITMT support, either the MC domain
> coincides with the PKG domain, or in case of multiple MC groups
> within a PKG domain, either Sub-NUMA Cluster (SNC) is enabled or the
> processor features Hybrid core layout (X86_HYBRID_CPU) which leads to
> three distinct possibilities:
> 
> o If PKG and MC domains coincide, PKG domain is degenerated by
>   sd_parent_degenerate() when building sched domain topology.
> 
> o If SNC is enabled, PKG domain is never added since
>   "x86_has_numa_in_package" is set and the topology will instead contain
>   NODE and NUMA domains.
> 
> o On X86_HYBRID_CPU which contains multiple MC groups within the PKG,
>   the PKG domain requires x86_sched_itmt_flags().
> 
> Thus, on Intel systems that contains multiple MC groups within the PKG
> and enables ITMT support, the PKG domain requires
> x86_sched_itmt_flags(). In all other cases PKG domain is either never
> added or is degenerated. Thus, returning x86_sched_itmt_flags()
> unconditionally at PKG domain on Intel systems should not lead to any
> functional changes.
> 
> On AMD systems with multiple LLCs (MC groups) within a PKG domain,
> enabling ITMT support requires setting SD_ASYM_PACKING to the PKG domain
> since the core rankings are assigned PKG-wide.
> 
> Core rankings on AMD processors is currently set by the amd-pstate
> driver when Preferred Core feature is supported. A subset of systems that
> support Preferred Core feature can be detected using
> X86_FEATURE_AMD_HETEROGENEOUS_CORES however, this does not cover all the
> systems that support Preferred Core ranking.
> 
> Detecting Preferred Core support on AMD systems requires inspecting CPPC
> Highest Perf on all present CPUs and checking if it differs on at least
> one CPU. Previous suggestion to use a synthetic feature to detect
> Preferred Core support [1] was found to be non-trivial to implement
> since BSP alone cannot detect if Preferred Core is supported and by the
> time AP comes up, alternatives are patched and setting a X86_FEATURE_*
> then is not possible.
> 
> Since x86 processors enabling ITMT support that consists multiple
> non-NUMA MC groups within a PKG requires SD_ASYM_PACKING flag set at the
> PKG domain, return x86_sched_itmt_flags unconditionally for the PKG
> domain.
> 
> Since x86_die_flags() would have just returned x86_sched_itmt_flags()
> after the change, remove the unnecessary wrapper and pass
> x86_sched_itmt_flags() directly as the flags function.
> 
> Link: https://lore.kernel.org/lkml/20241203221746.GKZ0-Dii5rnZppkM_e@fat_crate.local/ [1]
> Fixes: f3a052391822 ("cpufreq: amd-pstate: Enable amd-pstate preferred core support")
> Signed-off-by: K Prateek Nayak <kprateek.nayak@....com>

Reviewed-by: Tim Chen <tim.c.chen@...ux.intel.com>

Tim

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