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Message-ID: <4a8788c1-8424-40f6-a9da-bf135acad29b@lunn.ch>
Date: Fri, 13 Dec 2024 23:03:11 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Ninad Palsule <ninad@...ux.ibm.com>
Cc: robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
	joel@....id.au, andrew@...econstruct.com.au,
	devicetree@...r.kernel.org, eajames@...ux.ibm.com,
	linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org,
	linux-kernel@...r.kernel.org,
	NINAD PALSULE <ninadpalsule@...ibm.com>
Subject: Re: [PATCH v1 3/8] ARM: dts: aspeed: system1: Add RGMII support

> +&mac0 {
> +	status = "okay";
> +
> +	phy-mode = "rgmii-rxid";

Why is everybody getting RGMII wrong this week?

Do you have an extra long clock line on the PCB for the TX clock?

> +	phy-handle = <&ethphy0>;
> +
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_rgmii1_default>;
> +};
> +
>  &mac2 {
>  	status = "okay";
> +
> +	phy-mode = "rgmii";

Do you have extra long clock lines on the PCB for both Rx and Tx
clock?

I suspect you don't and the RGMII delays are messed up somehow.

	Andrew

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