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Message-ID: <Z2BvfKwdSyu5kzPh@probook>
Date: Mon, 16 Dec 2024 18:20:44 +0000
From: J. Neuschäfer <j.ne@...teo.net>
To: j.ne@...teo.net
Cc: Linus Walleij <linus.walleij@...aro.org>,
	Bartosz Golaszewski <brgl@...ev.pl>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Maxime Ripard <mripard@...nel.org>, linux-gpio@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/4] gpio: 74x164: Add latch GPIO support

On Fri, Dec 13, 2024 at 06:32:50PM +0100, J. Neuschäfer via B4 Relay wrote:
> From: "J. Neuschäfer" <j.ne@...teo.net>
> 
> The Fairchild MM74HC595 and other compatible parts have a latch clock
> input (also known as storage register clock input), which must be
> clocked once in order to apply any value that was serially shifted in.
> 
> This patch adds driver support for using a GPIO that connects to the
> latch clock.
> 
> Signed-off-by: J. Neuschäfer <j.ne@...teo.net>

I just noticed that this feature is unnecessary for my use-case:
The 74HC595 doesn't have a chip-select input, but if the rising-edge
triggered latch clock input is reinterpreted as an active-low chip
select, it does the right thing.

                     _   _       _   _
 shift clock    ____| |_| |_..._| |_| |_________

 latch clock                           * trigger
                ___                     ________
 chip select#      |___________________|



 -- jn

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