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Message-ID: <CA+V-a8sAiMTC9Y3vrOKshMZSFLzN0QczMk9B-++LyToG1r+qzw@mail.gmail.com>
Date: Mon, 16 Dec 2024 18:18:48 +0000
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Chris Brandt <chris.brandt@...esas.com>, Andi Shyti <andi.shyti@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>, Wolfram Sang <wsa@...nel.org>,
linux-renesas-soc@...r.kernel.org, linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org, Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH 8/9] i2c: riic: Add `riic_bus_barrier()` to check bus availability
Hi Geert,
Thank you for the review.
On Mon, Dec 16, 2024 at 4:09 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Dec 13, 2024 at 6:58 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Introduce a new `riic_bus_barrier()` function to verify bus availability
> > before initiating an I2C transfer. This function enhances the bus
> > arbitration check by ensuring that the SDA and SCL lines are not held low,
> > in addition to checking the BBSY flag using `readb_poll_timeout()`.
> >
> > Previously, only the BBSY flag was checked to determine bus availability.
> > However, it is possible for the SDA line to remain low even when BBSY = 0.
> > This new implementation performs an additional check on the SDA and SCL
> > lines to avoid potential bus contention issues.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/i2c/busses/i2c-riic.c
> > +++ b/drivers/i2c/busses/i2c-riic.c
>
> > @@ -135,6 +138,27 @@ static inline void riic_clear_set_bit(struct riic_dev *riic, u8 clear, u8 set, u
> > riic_writeb(riic, (riic_readb(riic, reg) & ~clear) | set, reg);
> > }
> >
> > +static int riic_bus_barrier(struct riic_dev *riic)
> > +{
> > + int ret;
> > + u8 val;
> > +
> > + /*
> > + * The SDA line can still be low even when BBSY = 0. Therefore, after checking
> > + * the BBSY flag, also verify that the SDA and SCL lines are not being held low.
> > + */
> > + ret = readb_poll_timeout(riic->base + riic->info->regs[RIIC_ICCR2], val,
> > + !(val & ICCR2_BBSY), 10, riic->adapter.timeout);
> > + if (ret)
> > + return -EBUSY;
> > +
> > + if (!(riic_readb(riic, RIIC_ICCR1) & ICCR1_SDAI) ||
> > + !(riic_readb(riic, RIIC_ICCR1) & ICCR1_SCLI))
>
> Surely you can read the register once, and check both bits?
>
Agreed, I will add a helper func for this something like below, as
this can be re-used in patch 9/9
static inline bool riic_lines_ok(struct riic_dev *riic)
{
u8 reg = riic_readb(riic, RIIC_ICCR1);
if (!(reg & ICCR1_SDAI) || !(reg & ICCR1_SCLI))
return false;
return true;
}
Cheers,
Prabhakar
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