linux-kernel - Re: [PATCH 7/8] dmaengine: fsl-edma: wait until no hardware request is in progress

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Message-ID: <458f8940-4451-4dbd-bd50-75a43e4248d3@oss.nxp.com>
Date: Wed, 18 Dec 2024 15:24:34 +0200
From: Larisa Ileana Grigore <larisa.grigore@....nxp.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Frank.Li@....com
Cc: dmaengine@...r.kernel.org, imx@...ts.linux.dev,
 linux-kernel@...r.kernel.org, s32@....com,
 Christophe Lizzi <clizzi@...hat.com>, Alberto Ruiz <aruizrui@...hat.com>,
 Enric Balletbo <eballetb@...hat.com>
Subject: Re: [PATCH 7/8] dmaengine: fsl-edma: wait until no hardware request
 is in progress

On 12/17/2024 5:27 PM, Krzysztof Kozlowski wrote:
> On 17/12/2024 15:19, Larisa Ileana Grigore wrote:
>> On 12/17/2024 7:27 AM, Krzysztof Kozlowski wrote:
>>> [You don't often get email from krzk@...nel.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
>>>
>>> On 16/12/2024 08:58, Larisa Grigore wrote:
>>>> Wait DMA hardware complete cleanup work by checking HRS bit before
>>>> disabling the channel to make sure trail data is already written to
>>>> memory.
>>>>
>>>> Fixes: 72f5801a4e2b7 ("dmaengine: fsl-edma: integrate v3 support")
>>>
>>> Why Fixes are at the end of the patchset? They must be either separate
>>> patchset or first patches.
>>>
>>> Best regards,
>>> Krzysztof
>>
>> Thank you for you review Krzysztof! Indeed, this commit should be moved
>> right after "dmaengine: fsl-edma: add eDMAv3 registers to edma_regs"
> 
> I don't understand this. Are you saying you introduce bug in one patch
> and fix in other? Why this cannot be separate patchset?

The bug was introduced by 72f5801a4e2b7 ("dmaengine: fsl-edma: integrate 
v3 support"), commit which is already upstream.

In the proposed fix, a channel is disabled after checking the HRS 
register which is a eDMAv3 specific register.

In the upstream implementation, "struct edma_regs" is created based on 
the eDMAv2 register layout [1] which is different compared to the eDMAv3 
register layout.
The "hrs" field, which is used to access the HRS register, was 
introduced in one of the patches from this set [2].
So, this fix depends on two other commits:
"dmaengine: fsl-edma: add eDMAv3 registers to edma_regs"  [2]
"dmaengine: fsl-edma: move eDMAv2 related registers to a new structure 
’edma2_regs’" [3]

"dmaengine: fsl-edma: add support for S32G based platforms" [4] depends 
also on [2] because it reads another eDMAv3 specific register "ES". This 
is the reason I've sent all these patches together.

Please let me know your thoughts.

[1] 
https://elixir.bootlin.com/linux/v6.12.4/source/drivers/dma/fsl-edma-common.h#L123
[2] 
https://lore.kernel.org/all/20241216075819.2066772-5-larisa.grigore@oss.nxp.com/
[3] 
https://lore.kernel.org/all/20241216075819.2066772-4-larisa.grigore@oss.nxp.com/
[4] 
https://lore.kernel.org/all/20241216075819.2066772-7-larisa.grigore@oss.nxp.com/

> Best regards,
> Krzysztof

Best regards,
Larisa