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Message-ID: <20241220123216.za6kzma4q2kyfhln@thinkpad>
Date: Fri, 20 Dec 2024 18:02:16 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Hans Zhang <18255117159@....com>
Cc: Siddharth Vadapalli <s-vadapalli@...com>, lpieralisi@...nel.org,
	kw@...ux.com, robh@...nel.org, bhelgaas@...gle.com,
	thomas.richard@...tlin.com, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org, rockswang7@...il.com
Subject: Re: [PATCH] PCI: cadence: Fixed cdns_pcie_host_link_setup return
 value.

On Fri, Dec 20, 2024 at 03:27:22PM +0800, Hans Zhang wrote:
> 
> 
> On 12/19/24 08:35, Manivannan Sadhasivam wrote:
> 
> > > We have 5 PCIe controllers, and if a few of them are not connected to the
> > > device. And it will affect the boot time.
> > > 
> > 
> > Why are you enabling all controllers? Can't you just enable the ones you know
> > the endpoints are going to be connected? I'm just trying to see if we can avoid
> > having a quirk.
> 
> Our SOC has a PC product situation, and there may be PCIe slots on the PCB,
> but the device may not be plugged in. So we need to enable all ports.
> 

Since you are trying to fail probe for the unused slots, your hardware is not
supporting hotplug as well I hope.

> > If you do not know, then you need to introduce a quirk for your platform.
> > But that requires your controller driver to be upstreamed. We cannot provide
> > hooks for downstream drivers in upstream.
> 
> Our controller driver currently has no plans for upstream and needs to wait
> for notification from the boss.
> 

Then the quirk patch has to wait until your driver is submitted upstream.

- Mani

-- 
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