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Message-ID: <Z2lSGcQCob6_upuT@ryzen>
Date: Mon, 23 Dec 2024 13:05:45 +0100
From: Niklas Cassel <cassel@...nel.org>
To: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] misc: pci_endpoint_test: Set reserved BARs for each
SoCs
On Mon, Dec 23, 2024 at 08:51:42PM +0900, Kunihiko Hayashi wrote:
> On 2024/12/19 22:08, Niklas Cassel wrote:
> > On Thu, Dec 19, 2024 at 08:17:50PM +0900, Kunihiko Hayashi wrote:
> > > On 2024/12/17 17:19, Niklas Cassel wrote:
[...]
> On the other hand, some other SoCs might have BAR masks fixed by the DWC
> IP configuration. These BARs will be exposed to the host even if the BAR
> mask is set to 0. However, such case hasn't been upstreamed, so there is
> no need to worry about them now.
The three schemes are:
BARn_SIZING_SCHEME_N =“Fixed Mask” (0)
BARn_SIZING_SCHEME_N =“Programmable Mask” (1)
BARn_SIZING_SCHEME_N =“Resizable BAR” (2)
Considering that the text:
"To disable a BAR (in any of the three schemes), your application can
write ‘0’ to the LSB of the BAR mask register."
says "in any of the three schemes", I would expect writing 0 to BAR_MASK
should disable a BAR, even for a Fixed Mask/Fixed BAR.
Kind regards,
Niklas
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