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Message-ID: <cfc95377-fe00-4a1f-abda-3b90571351e1@socionext.com>
Date: Tue, 24 Dec 2024 20:39:19 +0900
From: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
To: Niklas Cassel <cassel@...nel.org>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Kishon Vijay Abraham I <kishon@...nel.org>, Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] misc: pci_endpoint_test: Set reserved BARs for each
SoCs
Hi Niklas,
On 2024/12/23 21:05, Niklas Cassel wrote:
> On Mon, Dec 23, 2024 at 08:51:42PM +0900, Kunihiko Hayashi wrote:
>> On 2024/12/19 22:08, Niklas Cassel wrote:
>>> On Thu, Dec 19, 2024 at 08:17:50PM +0900, Kunihiko Hayashi wrote:
>>>> On 2024/12/17 17:19, Niklas Cassel wrote:
>
> [...]
>
>> On the other hand, some other SoCs might have BAR masks fixed by the DWC
>> IP configuration. These BARs will be exposed to the host even if the BAR
>> mask is set to 0. However, such case hasn't been upstreamed, so there is
>> no need to worry about them now.
>
> The three schemes are:
> BARn_SIZING_SCHEME_N =“Fixed Mask” (0)
> BARn_SIZING_SCHEME_N =“Programmable Mask” (1)
> BARn_SIZING_SCHEME_N =“Resizable BAR” (2)
>
> Considering that the text:
> "To disable a BAR (in any of the three schemes), your application can
> write ‘0’ to the LSB of the BAR mask register."
>
> says "in any of the three schemes", I would expect writing 0 to BAR_MASK
> should disable a BAR, even for a Fixed Mask/Fixed BAR.
The behavior in my case seemed suspicious "in any of the three schemes",
so I investigated and found it was an issue with specifying dbi2
address.
I confirmed disabing a BAR with writing 0 to the BAR mask.
Thank you for your explanation.
Again, this patch [2/2] will be withdrawn, and I expect that the
condition of the test and endpoint BAR reset for am654 will be fixed.
Thank you,
---
Best Regards
Kunihiko Hayashi
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