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Message-ID: <CAAhSdy1SGZTh4k1A22YWMeQ4ryCHeh3rV9feu+3SSF8b86J5nA@mail.gmail.com>
Date: Mon, 23 Dec 2024 19:20:58 +0530
From: Anup Patel <anup@...infault.org>
To: Atish Patra <atishp@...osinc.com>
Cc: Atish Patra <atishp@...shpatra.org>, Paul Walmsley <paul.walmsley@...ive.com>, 
	Palmer Dabbelt <palmer@...belt.com>, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org, 
	linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	Quan Zhou <zhouquan@...as.ac.cn>
Subject: Re: [PATCH 1/3] RISC-V: KVM: Redirect instruction access fault trap
 to guest

On Fri, Dec 13, 2024 at 2:26 AM Atish Patra <atishp@...osinc.com> wrote:
>
> From: Quan Zhou <zhouquan@...as.ac.cn>
>
> The M-mode redirects an unhandled instruction access
> fault trap back to S-mode when not delegating it to
> VS-mode(hedeleg). However, KVM running in HS-mode
> terminates the VS-mode software when back from M-mode.
>
> The KVM should redirect the trap back to VS-mode, and
> let VS-mode trap handler decide the next step.
>
> Signed-off-by: Atish Patra <atishp@...osinc.com>
> Signed-off-by: Quan Zhou <zhouquan@...as.ac.cn>

LGTM.

Reviewed-by: Anup Patel <anup@...infault.org>

Regards,
Anup

> ---
>  arch/riscv/kvm/vcpu_exit.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
> index fa98e5c024b2..c9f8b2094554 100644
> --- a/arch/riscv/kvm/vcpu_exit.c
> +++ b/arch/riscv/kvm/vcpu_exit.c
> @@ -187,6 +187,7 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
>         case EXC_STORE_MISALIGNED:
>         case EXC_LOAD_ACCESS:
>         case EXC_STORE_ACCESS:
> +       case EXC_INST_ACCESS:
>                 if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV) {
>                         kvm_riscv_vcpu_trap_redirect(vcpu, trap);
>                         ret = 1;
>
> --
> 2.34.1
>

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