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Message-ID: <CAAhSdy065Gk9jiMns+NMED4nOR20=ii0_rVrJZc+_EJ1DmkXVw@mail.gmail.com>
Date: Mon, 23 Dec 2024 19:23:29 +0530
From: Anup Patel <anup@...infault.org>
To: Atish Patra <atishp@...osinc.com>
Cc: Atish Patra <atishp@...shpatra.org>, Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, kvm@...r.kernel.org, kvm-riscv@...ts.infradead.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] RISC-V: KVM: Update firmware counters for various events
On Fri, Dec 13, 2024 at 2:27 AM Atish Patra <atishp@...osinc.com> wrote:
>
> SBI PMU specification defines few firmware counters which can be
> used by the guests to collect the statstics about various traps
> occurred in the host.
>
> Update these counters whenever a corresponding trap is taken
>
> Signed-off-by: Atish Patra <atishp@...osinc.com>
LGTM.
Reviewed-by: Anup Patel <anup@...infault.org>
Regards,
Anup
> ---
> arch/riscv/kvm/vcpu_exit.c | 31 +++++++++++++++++++++++++++----
> 1 file changed, 27 insertions(+), 4 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu_exit.c b/arch/riscv/kvm/vcpu_exit.c
> index c9f8b2094554..acdcd619797e 100644
> --- a/arch/riscv/kvm/vcpu_exit.c
> +++ b/arch/riscv/kvm/vcpu_exit.c
> @@ -165,6 +165,17 @@ void kvm_riscv_vcpu_trap_redirect(struct kvm_vcpu *vcpu,
> vcpu->arch.guest_context.sstatus |= SR_SPP;
> }
>
> +static inline int vcpu_redirect(struct kvm_vcpu *vcpu, struct kvm_cpu_trap *trap)
> +{
> + int ret = -EFAULT;
> +
> + if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV) {
> + kvm_riscv_vcpu_trap_redirect(vcpu, trap);
> + ret = 1;
> + }
> + return ret;
> +}
> +
> /*
> * Return > 0 to return to guest, < 0 on error, 0 (and set exit_reason) on
> * proper exit to userspace.
> @@ -183,15 +194,27 @@ int kvm_riscv_vcpu_exit(struct kvm_vcpu *vcpu, struct kvm_run *run,
> run->exit_reason = KVM_EXIT_UNKNOWN;
> switch (trap->scause) {
> case EXC_INST_ILLEGAL:
> + kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_ILLEGAL_INSN);
> + ret = vcpu_redirect(vcpu, trap);
> + break;
> case EXC_LOAD_MISALIGNED:
> + kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_MISALIGNED_LOAD);
> + ret = vcpu_redirect(vcpu, trap);
> + break;
> case EXC_STORE_MISALIGNED:
> + kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_MISALIGNED_STORE);
> + ret = vcpu_redirect(vcpu, trap);
> + break;
> case EXC_LOAD_ACCESS:
> + kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_ACCESS_LOAD);
> + ret = vcpu_redirect(vcpu, trap);
> + break;
> case EXC_STORE_ACCESS:
> + kvm_riscv_vcpu_pmu_incr_fw(vcpu, SBI_PMU_FW_ACCESS_STORE);
> + ret = vcpu_redirect(vcpu, trap);
> + break;
> case EXC_INST_ACCESS:
> - if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV) {
> - kvm_riscv_vcpu_trap_redirect(vcpu, trap);
> - ret = 1;
> - }
> + ret = vcpu_redirect(vcpu, trap);
> break;
> case EXC_VIRTUAL_INST_FAULT:
> if (vcpu->arch.guest_context.hstatus & HSTATUS_SPV)
>
> --
> 2.34.1
>
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