| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CANAwSgRgnwszYSH4uS-u=52f0vQuB2_SGcfNak_Xipe4=gXPOg@mail.gmail.com>
Date: Thu, 26 Dec 2024 10:56:28 +0530
From: Anand Moon <linux.amoon@...il.com>
To: Shawn Lin <shawn.lin@...k-chips.com>, Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, Rob Herring <robh@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>, Heiko Stuebner <heiko@...ech.de>
Cc: Philipp Zabel <p.zabel@...gutronix.de>, linux-pci@...r.kernel.org,
linux-rockchip@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v11 1/3] PCI: rockchip: Simplify clock handling by using
clk_bulk*() function
Hi All,
On Mon, 2 Dec 2024 at 20:42, Anand Moon <linux.amoon@...il.com> wrote:
>
> Currently, the driver acquires clks and prepare enable/disable unprepare
> the clks individually thereby making the driver complex to read.
> But this can be simplified by using the clk_bulk*() APIs.
> Use devm_clk_bulk_get_all() API to acquire all the clks and use
> clk_bulk_prepare_enable() to prepare enable clks
> and clk_bulk_disable_unprepare() APIs disable unprepare them in bulk.
>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> Signed-off-by: Anand Moon <linux.amoon@...il.com>
> ---
Gentle ping ?
Thanks
-Anand
> V11: None
> V10: None
> v9: Re write the commmit message.
> v8: Improve the description of the code changes in commit messagee.
> Add Rb: Manivannan
> v7: Update the functional change in commmit message.
> v6: None.
> v5: switch to use use devm_clk_bulk_get_all()? gets rid of hardcoding the
> clock names in driver.
> v4: use dev_err_probe for error patch.
> v3: Fix typo in commit message, dropped reported by.
> v2: Fix compilation error reported by Intel test robot.
> ---
> drivers/pci/controller/pcie-rockchip.c | 65 +++-----------------------
> drivers/pci/controller/pcie-rockchip.h | 7 ++-
> 2 files changed, 10 insertions(+), 62 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controller/pcie-rockchip.c
> index b9ade7632e11..53aaba03aca6 100644
> --- a/drivers/pci/controller/pcie-rockchip.c
> +++ b/drivers/pci/controller/pcie-rockchip.c
> @@ -129,29 +129,9 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
> return dev_err_probe(dev, PTR_ERR(rockchip->perst_gpio),
> "failed to get PERST# GPIO\n");
>
> - rockchip->aclk_pcie = devm_clk_get(dev, "aclk");
> - if (IS_ERR(rockchip->aclk_pcie)) {
> - dev_err(dev, "aclk clock not found\n");
> - return PTR_ERR(rockchip->aclk_pcie);
> - }
> -
> - rockchip->aclk_perf_pcie = devm_clk_get(dev, "aclk-perf");
> - if (IS_ERR(rockchip->aclk_perf_pcie)) {
> - dev_err(dev, "aclk_perf clock not found\n");
> - return PTR_ERR(rockchip->aclk_perf_pcie);
> - }
> -
> - rockchip->hclk_pcie = devm_clk_get(dev, "hclk");
> - if (IS_ERR(rockchip->hclk_pcie)) {
> - dev_err(dev, "hclk clock not found\n");
> - return PTR_ERR(rockchip->hclk_pcie);
> - }
> -
> - rockchip->clk_pcie_pm = devm_clk_get(dev, "pm");
> - if (IS_ERR(rockchip->clk_pcie_pm)) {
> - dev_err(dev, "pm clock not found\n");
> - return PTR_ERR(rockchip->clk_pcie_pm);
> - }
> + rockchip->num_clks = devm_clk_bulk_get_all(dev, &rockchip->clks);
> + if (rockchip->num_clks < 0)
> + return dev_err_probe(dev, err, "failed to get clocks\n");
>
> return 0;
> }
> @@ -375,39 +355,11 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie *rockchip)
> struct device *dev = rockchip->dev;
> int err;
>
> - err = clk_prepare_enable(rockchip->aclk_pcie);
> - if (err) {
> - dev_err(dev, "unable to enable aclk_pcie clock\n");
> - return err;
> - }
> -
> - err = clk_prepare_enable(rockchip->aclk_perf_pcie);
> - if (err) {
> - dev_err(dev, "unable to enable aclk_perf_pcie clock\n");
> - goto err_aclk_perf_pcie;
> - }
> -
> - err = clk_prepare_enable(rockchip->hclk_pcie);
> - if (err) {
> - dev_err(dev, "unable to enable hclk_pcie clock\n");
> - goto err_hclk_pcie;
> - }
> -
> - err = clk_prepare_enable(rockchip->clk_pcie_pm);
> - if (err) {
> - dev_err(dev, "unable to enable clk_pcie_pm clock\n");
> - goto err_clk_pcie_pm;
> - }
> + err = clk_bulk_prepare_enable(rockchip->num_clks, rockchip->clks);
> + if (err)
> + return dev_err_probe(dev, err, "failed to enable clocks\n");
>
> return 0;
> -
> -err_clk_pcie_pm:
> - clk_disable_unprepare(rockchip->hclk_pcie);
> -err_hclk_pcie:
> - clk_disable_unprepare(rockchip->aclk_perf_pcie);
> -err_aclk_perf_pcie:
> - clk_disable_unprepare(rockchip->aclk_pcie);
> - return err;
> }
> EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks);
>
> @@ -415,10 +367,7 @@ void rockchip_pcie_disable_clocks(void *data)
> {
> struct rockchip_pcie *rockchip = data;
>
> - clk_disable_unprepare(rockchip->clk_pcie_pm);
> - clk_disable_unprepare(rockchip->hclk_pcie);
> - clk_disable_unprepare(rockchip->aclk_perf_pcie);
> - clk_disable_unprepare(rockchip->aclk_pcie);
> + clk_bulk_disable_unprepare(rockchip->num_clks, rockchip->clks);
> }
> EXPORT_SYMBOL_GPL(rockchip_pcie_disable_clocks);
>
> diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h
> index a51b087ce878..f79c0a1cbbd0 100644
> --- a/drivers/pci/controller/pcie-rockchip.h
> +++ b/drivers/pci/controller/pcie-rockchip.h
> @@ -11,6 +11,7 @@
> #ifndef _PCIE_ROCKCHIP_H
> #define _PCIE_ROCKCHIP_H
>
> +#include <linux/clk.h>
> #include <linux/kernel.h>
> #include <linux/pci.h>
> #include <linux/pci-ecam.h>
> @@ -321,10 +322,8 @@ struct rockchip_pcie {
> struct reset_control *pm_rst;
> struct reset_control *aclk_rst;
> struct reset_control *pclk_rst;
> - struct clk *aclk_pcie;
> - struct clk *aclk_perf_pcie;
> - struct clk *hclk_pcie;
> - struct clk *clk_pcie_pm;
> + struct clk_bulk_data *clks;
> + int num_clks;
> struct regulator *vpcie12v; /* 12V power supply */
> struct regulator *vpcie3v3; /* 3.3V power supply */
> struct regulator *vpcie1v8; /* 1.8V power supply */
> --
> 2.47.0
>
Powered by blists - more mailing lists