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Message-ID: <rua4s52moqfxxv7qozs2ef4os4huyfsb3knhfzdwxl6rjo4noh@atq6ipuwj7xd>
Date: Sun, 29 Dec 2024 11:28:47 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Dario Binacchi <dario.binacchi@...rulasolutions.com>
Cc: linux-kernel@...r.kernel.org, linux-amarula@...rulasolutions.com, 
	Abel Vesa <abelvesa@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Fabio Estevam <festevam@...il.com>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Michael Turquette <mturquette@...libre.com>, Peng Fan <peng.fan@....com>, 
	Pengutronix Kernel Team <kernel@...gutronix.de>, Rob Herring <robh@...nel.org>, 
	Sascha Hauer <s.hauer@...gutronix.de>, Shawn Guo <shawnguo@...nel.org>, Stephen Boyd <sboyd@...nel.org>, 
	devicetree@...r.kernel.org, imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org, 
	linux-clk@...r.kernel.org
Subject: Re: [PATCH v7 10/23] dt-bindings: clock: imx8m-clock: add phandle to
 the anatop

On Fri, Dec 27, 2024 at 05:56:13PM +0100, Dario Binacchi wrote:
> Adding the phandle to the anatop node will break the ABI but will allow
> for a better description of the clock generation hardware, making the
> dependency of CCM on anatop explicit. Indeed, the CCM receives the PLLs
> generated by anatop as inputs, which, together with the oscillators,
> are used to generate the clocks for the on-chip peripherals.

I don't get this. If this device (CCM?) receives PLLs, then these are
clock inputs, not a phandle.

> 
> By doing this, it will also be possible to generalize the CCM driver
> code, which will no longer require the platform's compatible string to
> retrieve the anatop device node.
> 
> Signed-off-by: Dario Binacchi <dario.binacchi@...rulasolutions.com>
> 
> ---
> 
> Changes in v7:
> - New
> 
>  .../devicetree/bindings/clock/imx8m-clock.yaml         | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
> index c643d4a81478..b23e639e6389 100644
> --- a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
> +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml
> @@ -43,12 +43,20 @@ properties:
>        ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
>        for the full list of i.MX8M clock IDs.
>  
> +  fsl,anatop:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      The phandle to the anatop module that outputs the PLLs, which,
> +      along with the oscillators, are used to generate the clocks for
> +      the on-chip peripherals.

Explain how this is used by this device. If the explanation is "PLLs",
then it is wrong: PLLs are clock inputs.

Best regards,
Krzysztof


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