linux-kernel - Re: [PATCH v2 13/15] arm64: dts: imx8mm-phycore-som: Add overlay for rproc

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Message-ID: <221c8216-ce71-4ba2-9981-8612ff33ec2a@norik.com>
Date: Tue, 31 Dec 2024 08:34:32 +0100
From: Andrej Picej <andrej.picej@...ik.com>
To: Shawn Guo <shawnguo2@...h.net>
Cc: shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
 festevam@...il.com, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, imx@...ts.linux.dev,
 linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, upstream@...ts.phytec.de
Subject: Re: [PATCH v2 13/15] arm64: dts: imx8mm-phycore-som: Add overlay for
 rproc

Hi Shawn,

On 30. 12. 24 05:17, Shawn Guo wrote:
> On Mon, Dec 02, 2024 at 08:20:50AM +0100, Andrej Picej wrote:
>> From: Dominik Haller <d.haller@...tec.de>
>>
>> Adds a devicetree overlay containing reserved memory regions used
>> for intercore communication between A53 and M4 cores.
>>
>> Signed-off-by: Dominik Haller <d.haller@...tec.de>
>> Signed-off-by: Andrej Picej <andrej.picej@...ik.com>
>> ---
>> Changes in v2:
>>   - no change.
>> ---
>>   arch/arm64/boot/dts/freescale/Makefile        |  2 +
>>   .../dts/freescale/imx8mm-phycore-rpmsg.dtso   | 55 +++++++++++++++++++
>>   2 files changed, 57 insertions(+)
>>   create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso
>>
>> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
>> index 99be36a04db9..5bc083a7b778 100644
>> --- a/arch/arm64/boot/dts/freescale/Makefile
>> +++ b/arch/arm64/boot/dts/freescale/Makefile
>> @@ -125,9 +125,11 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
>>   
>>   imx8mm-phyboard-polis-peb-av-10-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phyboard-polis-peb-av-10.dtbo
>>   imx8mm-phyboard-polis-peb-eval-01-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phyboard-polis-peb-eval-01.dtbo
>> +imx8mm-phycore-rpmsg-dtbs += imx8mm-phyboard-polis-rdk.dtb imx8mm-phycore-rpmsg.dtbo
>>   
>>   dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-peb-av-10.dtb
>>   dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-peb-eval-01.dtb
>> +dtb-$(CONFIG_ARCH_MXC) += imx8mm-phycore-rpmsg.dtb
>>   
>>   dtb-$(CONFIG_ARCH_MXC) += imx8mm-phygate-tauri-l.dtb
>>   dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso b/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso
>> new file mode 100644
>> index 000000000000..0c61946f0cf8
>> --- /dev/null
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso
>> @@ -0,0 +1,55 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (C) 2024 PHYTEC Messtechnik GmbH
>> + * Author: Dominik Haller <d.haller@...tec.de>
>> + */
>> +
>> +/dts-v1/;
>> +/plugin/;
>> +
>> +#include <dt-bindings/clock/imx8mm-clock.h>
>> +
>> +&{/} {
>> +	reserved-memory {
>> +		#address-cells = <2>;
>> +		#size-cells = <2>;
>> +		ranges;
> 
> I'm getting this:
> 
> arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso:16.3-10: Warning (ranges_format): /fragment@..._overlay__/reserved-memory:ranges: empty "ranges" property but its #size-cells (2) differs from /fragment@..._overlay__ (1)
> arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso:13.18-43.4: Warning (avoid_default_addr_size): /fragment@..._overlay__/reserved-memory: Relying on default #address-cells value
> arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso:13.18-43.4: Warning (avoid_default_addr_size): /fragment@..._overlay__/reserved-memory: Relying on default #size-cells value
> 

I see, missed this before, sorry. But I have some problems fixing it.
I think the problem is that this is overlay, the same node put in the 
imx8mm-phycore-som.dtsi doesn't trigger a warning.
The only solution that I found is that I specify the default 
address-cells and size-cells in root node:


&{/} {
	#address-cells = <2>;
	#size-cells = <2>;

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
	...
	};
};

The same values are used in imx8mm.dtsi, but the checker fails to find 
these default values.
Not sure if this is the right solution, though. Your input would be 
helpful, thanks.

Best regards,
Andrej


> Shawn
> 
>> +
>> +		m4_reserved: m4@...00000 {
>> +			reg = <0 0x80000000 0 0x1000000>;
>> +			no-map;
>> +		};
>> +
>> +		vdev0vring0: vdev0vring0@...00000 {
>> +			reg = <0 0xb8000000 0 0x8000>;
>> +			no-map;
>> +		};
>> +
>> +		vdev0vring1: vdev0vring1@...08000 {
>> +			reg = <0 0xb8008000 0 0x8000>;
>> +			no-map;
>> +		};
>> +
>> +		rsc_table: rsc_table@...ff000 {
>> +			reg = <0 0xb80ff000 0 0x1000>;
>> +			no-map;
>> +		};
>> +
>> +		vdevbuffer: vdevbuffer@...00000 {
>> +			compatible = "shared-dma-pool";
>> +			reg = <0 0xb8400000 0 0x100000>;
>> +			no-map;
>> +		};
>> +	};
>> +
>> +	core-m4 {
>> +		compatible = "fsl,imx8mm-cm4";
>> +		clocks = <&clk IMX8MM_CLK_M4_DIV>;
>> +		mboxes = <&mu 0 1
>> +			&mu 1 1
>> +			&mu 3 1>;
>> +		mbox-names = "tx", "rx", "rxdb";
>> +		memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>, <&rsc_table>;
>> +		syscon = <&src>;
>> +	};
>> +};
>> -- 
>> 2.34.1
>>
>