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Message-ID: <49d2fd63-cd27-4a49-b581-62722e012451@kernel.org>
Date: Thu, 2 Jan 2025 19:26:02 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Rohit Visavalia <rohit.visavalia@....com>, mturquette@...libre.com,
 sboyd@...nel.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/3] dt-bindings: clock: xilinx: Convert VCU bindings to
 dtschema

On 02/01/2025 17:36, Rohit Visavalia wrote:
> Convert AMD (Xilinx) VCU bindings to yaml format.
> 


...

> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - xlnx,vcu
> +          - xlnx,vcu-logicoreip-1.0
> +
> +  reg:
> +    description:
> +      The base offset and size of the VCU_PL_SLCR register space.

Drop description, redundant.

> +    minItems: 1

There is no code like this. maxItems instead. Please use example-schema
or other recently reviewed bindings as starting point.

> +
> +  clocks:
> +    description: List of clock specifiers

Drop description.

> +    items:
> +      - description: pll ref clocksource
> +      - description: aclk

Original binding said different order. Mention change in commit msg with
explanation why.

Best regards,
Krzysztof

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