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Message-ID: <CA+V-a8vKa1huuYFhQ0dVpdpTsrh3dZVaaBxfNUF7JCUuZY4DWg@mail.gmail.com>
Date: Thu, 2 Jan 2025 22:06:44 +0000
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Rob Herring <robh@...nel.org>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>, Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Wim Van Sebroeck <wim@...ux-watchdog.org>,
Guenter Roeck <linux@...ck-us.net>, Magnus Damm <magnus.damm@...il.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>, linux-renesas-soc@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-watchdog@...r.kernel.org,
Biju Das <biju.das.jz@...renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@...esas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v2 4/6] dt-bindings: watchdog: renesas: Document
`renesas,syscon-cpg-error-rst` property
Hi Rob,
Thank you for the review.
On Thu, Jan 2, 2025 at 9:46 PM Rob Herring <robh@...nel.org> wrote:
>
> On Fri, Dec 27, 2024 at 07:02:08PM +0000, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > The RZ/V2H(P) CPG block includes Error Reset Registers (CPG_ERROR_RSTm).
> > A system reset is triggered in response to error interrupt factors, and
> > the corresponding bit is set in the CPG_ERROR_RSTm register. These
> > registers can be utilized by various IP blocks as needed.
> >
> > In the event of a watchdog overflow or underflow, a system reset is issued,
> > and the CPG_ERROR_RST2[0/1/2/3] bits are set depending on the watchdog in
> > use: CM33 = 0, CA55 = 1, CR8_0 = 2, CR8_1 = 3. For the watchdog driver to
> > determine and report the current boot status, it needs to read the
> > CPG_ERROR_RST2[0/1/2/3]bits and provide this information to the user upon
> > request.
> >
> > To facilitate this operation, add `renesas,syscon-cpg-error-rst`
> > property to the WDT node, which maps to the `syscon` CPG node, enabling
> > retrieval of the necessary information.
> >
> > Additionally, the property is marked as required for the RZ/V2H(P) SoC to
> > ensure future compatibility (e.g., where the same IP block is present on
> > the RZ/G3E SoC) and explicitly disallowed for other SoCs.
>
> This is the other half of the ABI change.
>
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > ---
> > v1->v2
> > - Renamed `renesas,r9a09g057-syscon-wdt-errorrst` to `renesas,syscon-cpg-error-rst`
> > - Updated commit message
> > ---
> > .../bindings/watchdog/renesas,wdt.yaml | 17 +++++++++++++++++
> > 1 file changed, 17 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> > index 29ada89fdcdc..ca62ae8b1b0c 100644
> > --- a/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> > +++ b/Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml
> > @@ -112,6 +112,19 @@ properties:
> >
> > timeout-sec: true
> >
> > + renesas,syscon-cpg-error-rst:
> > + $ref: /schemas/types.yaml#/definitions/phandle-array
> > + description:
> > + The first cell is a phandle to the SYSCON entry required to obtain
> > + the current boot status. The second cell specifies the CPG_ERROR_RSTm
> > + register offset within the SYSCON, and the third cell indicates the
> > + bit within the CPG_ERROR_RSTm register.
> > + items:
> > + - items:
> > + - description: Phandle to the CPG node
> > + - description: The CPG_ERROR_RSTm register offset
> > + - description: The bit within CPG_ERROR_RSTm register of interest
> > +
> > required:
> > - compatible
> > - reg
> > @@ -182,7 +195,11 @@ allOf:
> > properties:
> > interrupts: false
> > interrupt-names: false
> > + required:
> > + - renesas,syscon-cpg-error-rst
>
> New required property == ABI break
>
> Once the OS driver relies on this being present, then older DTs will
> break.
>
In this case there is no ABI break, as the driver code [0] does not
fail the probe when the property does not exist, it's just that it
won't report the status of current boot.
[0] https://lore.kernel.org/all/20241227190210.69025-6-prabhakar.mahadev-lad.rj@bp.renesas.com/
Cheers,
Prabhakar
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