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Message-ID: <ihjgmi6hd5dzv4kxskerc7px4u4tynwxa6edwa2mozzczdar3b@xdplqfwme3lm>
Date: Fri, 3 Jan 2025 08:42:17 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Varadarajan Narayanan <quic_varada@...cinc.com>
Cc: bhelgaas@...gle.com, lpieralisi@...nel.org, kw@...ux.com,
manivannan.sadhasivam@...aro.org, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
vkoul@...nel.org, kishon@...nel.org, andersson@...nel.org, konradybcio@...nel.org,
p.zabel@...gutronix.de, quic_nsekar@...cinc.com, dmitry.baryshkov@...aro.org,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org
Subject: Re: [PATCH v5 1/5] dt-bindings: phy: qcom,uniphy-pcie: Document PCIe
uniphy
On Thu, Jan 02, 2025 at 05:00:15PM +0530, Varadarajan Narayanan wrote:
> + "#phy-cells":
> + const: 0
> +
> + "#clock-cells":
> + const: 0
> +
> + num-lanes: true
$ref: /schemas/types.yaml#/definitions/uint32
enum:
or this should be moved to some shared schema.
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - resets
> + - "#phy-cells"
> + - "#clock-cells"
num-lanes should be required. How does it work without it? There is no
default.
Best regards,
Krzysztof
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