linux-kernel - Re: [PATCH 1/5] dt-bindings: PCI: mediatek-gen3: Add MT8196 support

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Message-ID: <0555fb64-312d-4490-9b03-89fca580c602@collabora.com>
Date: Fri, 3 Jan 2025 10:26:21 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Jianjun Wang <jianjun.wang@...iatek.com>,
 Bjorn Helgaas <bhelgaas@...gle.com>,
 Lorenzo Pieralisi <lpieralisi@...nel.org>,
 Krzysztof Wilczyński <kw@...ux.com>,
 Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>
Cc: Ryder Lee <ryder.lee@...iatek.com>, linux-pci@...r.kernel.org,
 linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 Xavier Chang <Xavier.Chang@...iatek.com>
Subject: Re: [PATCH 1/5] dt-bindings: PCI: mediatek-gen3: Add MT8196 support

Il 03/01/25 07:00, Jianjun Wang ha scritto:
> Add compatible string and clock definition for MT8196. It has 6 clocks like
> the MT8195, but 2 of them are different.
> 
> Signed-off-by: Jianjun Wang <jianjun.wang@...iatek.com>
> ---
>   .../bindings/pci/mediatek-pcie-gen3.yaml      | 29 +++++++++++++++++++
>   1 file changed, 29 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index f05aab2b1add..b4158a666fb6 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -51,6 +51,7 @@ properties:
>                 - mediatek,mt7986-pcie
>                 - mediatek,mt8188-pcie
>                 - mediatek,mt8195-pcie
> +              - mediatek,mt8196-pcie
>             - const: mediatek,mt8192-pcie
>         - const: mediatek,mt8192-pcie
>         - const: airoha,en7581-pcie
> @@ -197,6 +198,34 @@ allOf:
>             minItems: 1
>             maxItems: 2
>   
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - mediatek,mt8196-pcie
> +    then:
> +      properties:
> +        clocks:
> +          minItems: 6
> +
> +        clock-names:
> +          items:
> +            - const: pl_250m
> +            - const: tl_26m
> +            - const: peri_26m
> +            - const: peri_mem
> +            - const: ahb_apb

ahb_apb is a bus clock, so you can set it as

- const: bus


> +            - const: low_power

Can you please clarify what the LP clock is for?

Thanks,
Angelo

> +
> +        resets:
> +          minItems: 1
> +          maxItems: 2
> +
> +        reset-names:
> +          minItems: 1
> +          maxItems: 2
> +
>     - if:
>         properties:
>           compatible: