linux-kernel - Re: [PATCH v8 1/5] dt-bindings: clock: qcom: Add CMN PLL clock controller for IPQ SoC

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Message-ID: <a915e51c-8f58-4744-a172-67fd0e7f6020@kernel.org>
Date: Fri, 3 Jan 2025 16:06:07 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Luo Jie <quic_luoj@...cinc.com>, Bjorn Andersson <andersson@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
 Will Deacon <will@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, quic_kkumarcs@...cinc.com,
 quic_suruchia@...cinc.com, quic_pavir@...cinc.com, quic_linchen@...cinc.com,
 quic_leiwei@...cinc.com, bartosz.golaszewski@...aro.org,
 srinivas.kandagatla@...aro.org
Subject: Re: [PATCH v8 1/5] dt-bindings: clock: qcom: Add CMN PLL clock
 controller for IPQ SoC

On 03/01/2025 08:31, Luo Jie wrote:
> The CMN PLL controller provides clocks to networking hardware blocks
> and to GCC on Qualcomm IPQ9574 SoC. It receives input clock from the
> on-chip Wi-Fi, and produces output clocks at fixed rates. These output
> rates are predetermined, and are unrelated to the input clock rate.
> The primary purpose of CMN PLL is to supply clocks to the networking
> hardware such as PPE (packet process engine), PCS and the externally
> connected switch or PHY device. The CMN PLL block also outputs fixed
> rate clocks to GCC, such as 24 MHZ as XO clock and 32 KHZ as sleep
> clock supplied to GCC.
> 
> Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Best regards,
Krzysztof