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Message-ID: <CACRpkdarstoQW+ZBi+MWxEff_=h8bPo9+fwy=LW2uhWRuQ6YSQ@mail.gmail.com>
Date: Tue, 7 Jan 2025 16:11:41 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Cc: chang hao <ot_chhao.chang@...iatek.com>, matthias.bgg@...il.com,
sean.wang@...nel.org, linux-mediatek@...ts.infradead.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH] v1 pinctrl: mtk-eint: add eint new design for mt8196
On Thu, Dec 19, 2024 at 1:39 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
> Il 17/12/24 14:45, Linus Walleij ha scritto:
> > Hi Chang,
> >
> > thanks for your patch!
> >
> > On Tue, Dec 3, 2024 at 2:13 PM chang hao <ot_chhao.chang@...iatek.com> wrote:
> >
> >> From: Chhao Chang <ot_chhao.chang@...iatek.com>
> >>
> >> Change 1: change EINT from 1 address to 5 addresses,
> >> Eint number is stored on each base.
> >> Change 2: Compatible with 1 address design
> >>
> >> Signed-off-by: Chhao Chang <ot_chhao.chang@...iatek.com>
> >
> > This patch looks good to me, as preparation for mt8196,
> > but can one of the Mediatek experts please
> > review it? If nothing happens I will just apply it I guess...
> >
>
> Linus, that's something like the fourth time that he pushes variations of this
> patch which do break all MediaTek SoCs in a way or another, leaving only MT8196
> hopefully-functional.
That's unfortunate, and I see there is some annoyance building
up.
The maintainers are here to protect the code and the change
would have anyway just been reverted soon if it breaks stuff.
How can we get this contribution on a better path?
Chhao: maybe you can split your idea into smaller changes
that can be reviewed and tested one by one?
Yours,
Linus Walleij
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