lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20250107151323.GA7368@willie-the-truck>
Date: Tue, 7 Jan 2025 15:13:24 +0000
From: Will Deacon <will@...nel.org>
To: Mark Brown <broonie@...nel.org>
Cc: Catalin Marinas <catalin.marinas@....com>,
	Jonathan Corbet <corbet@....net>, Marc Zyngier <maz@...nel.org>,
	Oliver Upton <oliver.upton@...ux.dev>,
	Joey Gouly <joey.gouly@....com>,
	Suzuki K Poulose <suzuki.poulose@....com>,
	Shuah Khan <shuah@...nel.org>, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
	kvmarm@...ts.linux.dev, linux-kselftest@...r.kernel.org
Subject: Re: [PATCH v4 5/9] arm64/sysreg: Update ID_AA64SMFR0_EL1 to DDI0601
 2024-09

On Wed, Dec 11, 2024 at 01:02:50AM +0000, Mark Brown wrote:
> DDI0601 2024-09 introduces SME 2.2 as well as a few new optional features,
> update sysreg to reflect the changes in ID_AA64SMFR0_EL1 enumerating them.
> 
> Signed-off-by: Mark Brown <broonie@...nel.org>
> ---
>  arch/arm64/tools/sysreg | 32 +++++++++++++++++++++++++++++++-
>  1 file changed, 31 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index c792bd3b0afbb5fb7e438a4d760d9f2d15621eee..d78b12c59658b480739ae797f5ea2c2f14d8d765 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -1105,6 +1105,7 @@ UnsignedEnum	59:56	SMEver
>  	0b0000	SME
>  	0b0001	SME2
>  	0b0010	SME2p1
> +	0b0011	SME2p2
>  	0b0000	IMP
>  EndEnum
>  UnsignedEnum	55:52	I16I64
> @@ -1169,7 +1170,36 @@ UnsignedEnum	28	SF8DP2
>  	0b0	NI
>  	0b1	IMP
>  EndEnum
> -Res0	27:0
> +UnsignedEnum	27	SF8MM8
> +	0b0	NI
> +	0b1	IMP
> +EndEnum
> +UnsignedEnum	26	SF8MM4
> +	0b0	NI
> +	0b1	IMP
> +EndEnum

afaict, bits 27 and 26 are still RES0 in all the documentation I can
find...

Will

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ