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Message-ID: <6d9ea6f5-4ff5-40ed-b470-e40c1f6a5982@lunn.ch>
Date: Tue, 7 Jan 2025 18:56:24 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Ninad Palsule <ninad@...ux.ibm.com>
Cc: minyard@....org, robh@...nel.org, krzk+dt@...nel.org,
	conor+dt@...nel.org, andrew+netdev@...n.ch, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
	ratbert@...aday-tech.com, openipmi-developer@...ts.sourceforge.net,
	netdev@...r.kernel.org, joel@....id.au, andrew@...econstruct.com.au,
	devicetree@...r.kernel.org, eajames@...ux.ibm.com,
	linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 05/10] ARM: dts: aspeed: system1: Add RGMII support

On Tue, Jan 07, 2025 at 10:23:42AM -0600, Ninad Palsule wrote:
> system1 has 2 transceiver connected through the RGMII interfaces. Added
> device tree entry to enable RGMII support.
> 
> ASPEED AST2600 documentation recommends using 'rgmii-rxid' as a
> 'phy-mode' for mac0 and mac1 to enable the RX interface delay from the
> PHY chip.

Why?

Does the mac0 TX clock have an extra long clock line on the PCB?

Does the mac1 TX and RX clocks have extra long clock lines on the PCB?

Anything but rgmii-id is in most cases wrong, so you need a really
good explanation why you need to use something else. Something that
shows you understand what is going on, and why what you have is
correct.

     Andrew

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