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Message-ID: <6bb0f113-5de4-44e6-8f36-2e9ef53dc8ae@quicinc.com>
Date: Tue, 7 Jan 2025 15:15:20 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: fange zhang <quic_fangez@...cinc.com>, Rob Clark <robdclark@...il.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie
<airlied@...il.com>, Simona Vetter <simona@...ll.ch>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>,
Li Liu
<quic_lliu6@...cinc.com>,
Xiangxu Yin <quic_xiangxuy@...cinc.com>
Subject: Re: [PATCH] drm/msm/dpu: Add writeback support for SM6150
On 1/6/2025 8:50 PM, fange zhang wrote:
>
>
> On 2025/1/7 3:15, Abhinav Kumar wrote:
>>
>>
>> On 1/5/2025 10:39 PM, Fange Zhang wrote:
>>> On the SM6150 platform there is WB_2 block. Add it to the SM6150
>>> catalog.
>>>
>>> Signed-off-by: Fange Zhang <quic_fangez@...cinc.com>
>>> ---
>>> A followup patch to add writeback configuration for the SM6150 catalog
>>> ---
>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 18
>>> ++++++++ ++++++++++
>>> 1 file changed, 18 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
>>> b/ drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
>>> index
>>> 621a2140f675fa28b3a7fcd8573e59b306cd6832..6d32deead77728264b6de6d5fd2843a81afdf355 100644
>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
>>> @@ -27,6 +27,7 @@ static const struct dpu_mdp_cfg sm6150_mdp = {
>>> [DPU_CLK_CTRL_DMA1] = { .reg_off = 0x2b4, .bit_off = 8 },
>>> [DPU_CLK_CTRL_DMA2] = { .reg_off = 0x2bc, .bit_off = 8 },
>>> [DPU_CLK_CTRL_DMA3] = { .reg_off = 0x2c4, .bit_off = 8 },
>>> + [DPU_CLK_CTRL_WB2] = { .reg_off = 0x3b8, .bit_off = 24 },
>>> },
>>> };
>>> @@ -164,6 +165,21 @@ static const struct dpu_pingpong_cfg sm6150_pp[]
>>> = {
>>> },
>>> };
>>> +static const struct dpu_wb_cfg sm6150_wb[] = {
>>> + {
>>> + .name = "wb_2", .id = WB_2,
>>> + .base = 0x66000, .len = 0x2c8,
>>
>> This is not correct.
>>
>> WB_2 offset is at 0x66000. However, MDP base address accounts for the
>> 0x1000 offset. So this should still be 0x65000.
>>
>> Why is 0x66000 used here? It does not match the docs.
> sorry, missed it, yes it should be 0x65000, will fix it in next patch.
>>
>> How was this change verified?
> i checked drm state, and found the new writeback connector is loaded
> successfully.
>>
Thats not enough. To validate writeback please use either modetest or
kms_writeback.
>>> + .features = WB_SM8250_MASK,
>>> + .format_list = wb2_formats_rgb,
>>> + .num_formats = ARRAY_SIZE(wb2_formats_rgb),
>>> + .clk_ctrl = DPU_CLK_CTRL_WB2,
>>> + .xin_id = 6,
>>> + .vbif_idx = VBIF_RT,
>>> + .maxlinewidth = 2160,
>>> + .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
>>> + },
>>> +};
>>> +
>>> static const struct dpu_intf_cfg sm6150_intf[] = {
>>> {
>>> .name = "intf_0", .id = INTF_0,
>>> @@ -244,6 +260,8 @@ const struct dpu_mdss_cfg dpu_sm6150_cfg = {
>>> .dspp = sm6150_dspp,
>>> .pingpong_count = ARRAY_SIZE(sm6150_pp),
>>> .pingpong = sm6150_pp,
>>> + .wb_count = ARRAY_SIZE(sm6150_wb),
>>> + .wb = sm6150_wb,
>>> .intf_count = ARRAY_SIZE(sm6150_intf),
>>> .intf = sm6150_intf,
>>> .vbif_count = ARRAY_SIZE(sdm845_vbif),
>>>
>>> ---
>>> base-commit: 8155b4ef3466f0e289e8fcc9e6e62f3f4dceeac2
>>> change-id: 20250106-add-writeback-support-for-sm6150-ba7657196ea8
>>>
>>> Best regards,
>
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