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Message-Id: <20250107084955.2750154-1-niravkumar.l.rabara@intel.com>
Date: Tue,  7 Jan 2025 16:49:55 +0800
From: niravkumar.l.rabara@...el.com
To: Dinh Nguyen <dinguyen@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	niravkumar.l.rabara@...el.com,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH] arm64: dts: socfpga: agilex5: add clock-names property to nand node

From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>

Cadence nand controller driver requires clock-names = "nf_clk" property.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..4357572e96e3 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -272,6 +272,7 @@ nand: nand-controller@...80000 {
 			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&clkmgr AGILEX5_NAND_NF_CLK>;
 			cdns,board-delay-ps = <4830>;
+			clock-names = "nf_clk";
 			status = "disabled";
 		};
 
-- 
2.25.1


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