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Message-ID: <03897255-6591-4672-9038-e307e6765010@amd.com>
Date: Tue, 7 Jan 2025 14:57:29 +0100
From: Michal Simek <michal.simek@....com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Shubhrajyoti Datta <shubhrajyoti.datta@....com>
Cc: Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Borislav Petkov <bp@...en8.de>, Tony Luck <tony.luck@...el.com>,
James Morse <james.morse@....com>, Mauro Carvalho Chehab
<mchehab@...nel.org>, Robert Richter <rric@...nel.org>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-edac@...r.kernel.org, git@....com
Subject: Re: [PATCH v5 4/5] dt-bindings: memory-controllers: Add support for
Versal NET EDAC
On 1/7/25 07:37, Krzysztof Kozlowski wrote:
> On Mon, Jan 06, 2025 at 11:03:57AM +0530, Shubhrajyoti Datta wrote:
>> +description:
>> + The integrated DDR Memory Controllers (DDRMCs) support both DDR5 and LPDDR5
>> + compact and extended memory interfaces. Versal NET DDR memory controller
>> + has an optional ECC support which correct single bit ECC errors and detect
>> + double bit ECC errors. It also has support for reporting other errors like
>> + MMCM (Mixed-Mode Clock Manager) errors and General software errors.
>> +
>> +properties:
>> + compatible:
>> + const: amd,versal-net-ddrmc5
>
> git grep amd,versal-net - 0 results
>
> Where is your soc?
Actually it should be still branded as xlnx,versal-net to follow the same
pattern for other drivers.
And likely pattern should be also listed in
Documentation/devicetree/bindings/soc/xilinx/xilinx.yaml
Thanks,
Michal
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