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Message-ID: <1950286.IobQ9Gjlxr@diego>
Date: Wed, 08 Jan 2025 11:01:30 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Alexey Charkov <alchark@...il.com>
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Alexey Charkov <alchark@...il.com>
Subject:
Re: [PATCH v2 2/3] arm64: dts: rockchip: Add SPDIF nodes to RK3588(s) device
trees
Hi Alexey,
Am Mittwoch, 8. Januar 2025, 10:09:07 CET schrieb Alexey Charkov:
> RK3588s has four SPDIF transmitters, and the full RK3588 has six.
> They are fully compatible to RK3568 ones. Add respective nodes
> to .dtsi files.
While it may seem that way, we still want soc-specific compatibles,
to future-proof this.
I.e. going the the
compatible = "rockchip,rk3588-spdif", "rockchip,rk3568-spdif";
way, so that now things can just match against the rk3568, but if some
fault emerges later on the code can be fixed with the DT staying just
compatible.
The spdif also has an example already for all the spdif variants that are
compatible to the rk3066 [3], so it'd need another "items" block for things
being compatible with the rk3568.
Heiko
[3] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/Documentation/devicetree/bindings/sound/rockchip-spdif.yaml
> Adapted from vendor sources at [1] and [2], respectively
>
> [1] https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> [2] https://github.com/rockchip-linux/kernel/blob/develop-5.10/arch/arm64/boot/dts/rockchip/rk3588.dtsi
>
> Signed-off-by: Alexey Charkov <alchark@...il.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 64 ++++++++++++++++++++++++++
> arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 ++++++++++++
> 2 files changed, 94 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> index 8cfa30837ce72581d0b513a8274ab0177eb5ae15..ff0c9191737b34979a408067df1a664dbe87395f 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
> @@ -1318,6 +1318,21 @@ vop_mmu: iommu@...97e00 {
> status = "disabled";
> };
>
> + spdif_tx2: spdif-tx@...b0000 {
> + compatible = "rockchip,rk3568-spdif";
> + reg = <0x0 0xfddb0000 0x0 0x1000>;
> + assigned-clock-parents = <&cru PLL_AUPLL>;
> + assigned-clocks = <&cru CLK_SPDIF2_DP0_SRC>;
> + clock-names = "mclk", "hclk";
> + clocks = <&cru MCLK_SPDIF2>, <&cru HCLK_SPDIF2_DP0>;
> + dma-names = "tx";
> + dmas = <&dmac1 6>;
> + interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH 0>;
> + power-domains = <&power RK3588_PD_VO0>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> i2s4_8ch: i2s@...c0000 {
> compatible = "rockchip,rk3588-i2s-tdm";
> reg = <0x0 0xfddc0000 0x0 0x1000>;
> @@ -1335,6 +1350,21 @@ i2s4_8ch: i2s@...c0000 {
> status = "disabled";
> };
>
> + spdif_tx3: spdif-tx@...e0000 {
> + compatible = "rockchip,rk3568-spdif";
> + reg = <0x0 0xfdde0000 0x0 0x1000>;
> + assigned-clock-parents = <&cru PLL_AUPLL>;
> + assigned-clocks = <&cru CLK_SPDIF3_SRC>;
> + clock-names = "mclk", "hclk";
> + clocks = <&cru MCLK_SPDIF3>, <&cru HCLK_SPDIF3>;
> + dma-names = "tx";
> + dmas = <&dmac1 7>;
> + interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH 0>;
> + power-domains = <&power RK3588_PD_VO1>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> i2s5_8ch: i2s@...f0000 {
> compatible = "rockchip,rk3588-i2s-tdm";
> reg = <0x0 0xfddf0000 0x0 0x1000>;
> @@ -2016,6 +2046,40 @@ &i2s3_sdi
> status = "disabled";
> };
>
> + spdif_tx0: spdif-tx@...e0000 {
> + compatible = "rockchip,rk3568-spdif";
> + reg = <0x0 0xfe4e0000 0x0 0x1000>;
> + assigned-clock-parents = <&cru PLL_AUPLL>;
> + assigned-clocks = <&cru CLK_SPDIF0_SRC>;
> + clock-names = "mclk", "hclk";
> + clocks = <&cru MCLK_SPDIF0>, <&cru HCLK_SPDIF0>;
> + dma-names = "tx";
> + dmas = <&dmac0 5>;
> + interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH 0>;
> + pinctrl-0 = <&spdif0m0_tx>;
> + pinctrl-names = "default";
> + power-domains = <&power RK3588_PD_AUDIO>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> + spdif_tx1: spdif-tx@...f0000 {
> + compatible = "rockchip,rk3568-spdif";
> + reg = <0x0 0xfe4f0000 0x0 0x1000>;
> + assigned-clock-parents = <&cru PLL_AUPLL>;
> + assigned-clocks = <&cru CLK_SPDIF1_SRC>;
> + clock-names = "mclk", "hclk";
> + clocks = <&cru MCLK_SPDIF1>, <&cru HCLK_SPDIF1>;
> + dma-names = "tx";
> + dmas = <&dmac1 5>;
> + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH 0>;
> + pinctrl-0 = <&spdif1m0_tx>;
> + pinctrl-names = "default";
> + power-domains = <&power RK3588_PD_AUDIO>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> gic: interrupt-controller@...00000 {
> compatible = "arm,gic-v3";
> reg = <0x0 0xfe600000 0 0x10000>, /* GICD */
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
> index 4a950907ea6f51c1d4123d52b73b726226db37bc..ba1bcd12c558847680aaaa2377d6d0a84fdaa1db 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi
> @@ -67,6 +67,21 @@ u2phy1_otg: otg-port {
> };
> };
>
> + spdif_tx5: spdif-tx@...b8000 {
> + compatible = "rockchip,rk3568-spdif";
> + reg = <0x0 0xfddb8000 0x0 0x1000>;
> + assigned-clock-parents = <&cru PLL_AUPLL>;
> + assigned-clocks = <&cru CLK_SPDIF5_DP1_SRC>;
> + clock-names = "mclk", "hclk";
> + clocks = <&cru MCLK_SPDIF5>, <&cru HCLK_SPDIF5_DP1>;
> + dma-names = "tx";
> + dmas = <&dmac1 22>;
> + interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH 0>;
> + power-domains = <&power RK3588_PD_VO0>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> i2s8_8ch: i2s@...c8000 {
> compatible = "rockchip,rk3588-i2s-tdm";
> reg = <0x0 0xfddc8000 0x0 0x1000>;
> @@ -84,6 +99,21 @@ i2s8_8ch: i2s@...c8000 {
> status = "disabled";
> };
>
> + spdif_tx4: spdif-tx@...e8000 {
> + compatible = "rockchip,rk3568-spdif";
> + reg = <0x0 0xfdde8000 0x0 0x1000>;
> + assigned-clock-parents = <&cru PLL_AUPLL>;
> + assigned-clocks = <&cru CLK_SPDIF4_SRC>;
> + clock-names = "mclk", "hclk";
> + clocks = <&cru MCLK_SPDIF4>, <&cru HCLK_SPDIF4>;
> + dma-names = "tx";
> + dmas = <&dmac1 8>;
> + interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH 0>;
> + power-domains = <&power RK3588_PD_VO1>;
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> i2s6_8ch: i2s@...f4000 {
> compatible = "rockchip,rk3588-i2s-tdm";
> reg = <0x0 0xfddf4000 0x0 0x1000>;
>
>
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