linux-kernel - Re: [PATCH v2 0/5] Support clock and reset unit of Rockchip RK3528

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Message-ID: <Z35n_YBSAxWN-4DV@pie>
Date: Wed, 8 Jan 2025 11:56:45 +0000
From: Yao Zi <ziyao@...root.org>
To: Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Heiko Stuebner <heiko@...ech.de>,
	Philipp Zabel <p.zabel@...gutronix.de>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/5] Support clock and reset unit of Rockchip RK3528

On Wed, Jan 08, 2025 at 11:46:01AM +0000, Yao Zi wrote:
> Similar to previous Rockchip SoCs, reset controller on RK3528 shares
> MMIO region with clock controller, combined as CRU. They're represented
> as a single node in dt.
> 
> For the reset controller, only bindings are included in this series
> because it's hard to test the reset controller without support for some
> peripherals (e.g. pinctrl). I'd like to first make dt and basic
> peripherals available, then submit the driver.
> 
> This is tested on Radxa E20C board. With some out-of-tree drivers, I've
> successfully brouhgt up UART, pinctrl/gpio and I2C. A clock dump could
> be obtained from [1].
> 
> [1]: https://gist.github.com/ziyao233/032961d1eebeecb9a41fea2d690e8351

Oops, I forgot to attach the changelog. Sorry for the inconvenience and
please refer to this,

- dt-binding changes
  - relicense binding headers as GPL-2.0-only OR MIT
  - use gapless integers starting from 0 for binding IDs
  - make input clocks essential, add corresponding description
  - rename the input clock that is generated by phy module as "gmac0"
  - style fixes
- driver changes
  - format in the common Rockchip driver style
  - drop initializing code of the reset controller, as it'll not be
    supported in this series

> 
> Yao Zi (5):
>   dt-bindings: clock: Document clock and reset unit of RK3528
>   clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE
>   clk: rockchip: Add clock controller driver for RK3528 SoC
>   arm64: dts: rockchip: Add clock generators for RK3528 SoC
>   arm64: dts: rockchip: Add UART clocks for RK3528 SoC
> 
>  .../bindings/clock/rockchip,rk3528-cru.yaml   |   67 +
>  arch/arm64/boot/dts/rockchip/rk3528.dtsi      |   68 +-
>  drivers/clk/rockchip/Kconfig                  |    7 +
>  drivers/clk/rockchip/Makefile                 |    1 +
>  drivers/clk/rockchip/clk-pll.c                |   10 +-
>  drivers/clk/rockchip/clk-rk3528.c             | 1114 +++++++++++++++++
>  drivers/clk/rockchip/clk.h                    |   22 +
>  .../dt-bindings/clock/rockchip,rk3528-cru.h   |  453 +++++++
>  .../dt-bindings/reset/rockchip,rk3528-cru.h   |  241 ++++
>  9 files changed, 1978 insertions(+), 5 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
>  create mode 100644 drivers/clk/rockchip/clk-rk3528.c
>  create mode 100644 include/dt-bindings/clock/rockchip,rk3528-cru.h
>  create mode 100644 include/dt-bindings/reset/rockchip,rk3528-cru.h
> 
> -- 
> 2.47.1
>