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Message-ID: <tep74dy3oc6y2wwhp6bthv6brhkge7cojzrtj6x53lvtsws4g5@areqtyxhyayq>
Date: Thu, 9 Jan 2025 09:59:25 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Yao Zi <ziyao@...root.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>, Philipp Zabel <p.zabel@...gutronix.de>,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/5] dt-bindings: clock: Document clock and reset unit
of RK3528
On Wed, Jan 08, 2025 at 11:46:02AM +0000, Yao Zi wrote:
> There are two types of clocks in RK3528 SoC, CRU-managed and
> SCMI-managed. Independent IDs are assigned to them.
>
> For the reset part, differing from previous Rockchip SoCs and
> downstream bindings which embeds register offsets into the IDs, gapless
> numbers starting from zero are used.
>
> Signed-off-by: Yao Zi <ziyao@...root.org>
> ---
> .../bindings/clock/rockchip,rk3528-cru.yaml | 67 +++
> .../dt-bindings/clock/rockchip,rk3528-cru.h | 453 ++++++++++++++++++
> .../dt-bindings/reset/rockchip,rk3528-cru.h | 241 ++++++++++
> 3 files changed, 761 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> create mode 100644 include/dt-bindings/clock/rockchip,rk3528-cru.h
> create mode 100644 include/dt-bindings/reset/rockchip,rk3528-cru.h
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> new file mode 100644
> index 000000000000..19dbda858172
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3528-cru.yaml
> @@ -0,0 +1,67 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rockchip,rk3528-cru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip RK3528 Clock and Reset Controller
> +
> +maintainers:
> + - Yao Zi <ziyao@...root.org>
> +
> +description: |
> + The RK3528 clock controller generates the clock and also implements a reset
> + controller for SoC peripherals. For example, it provides SCLK_UART0 and
> + PCLK_UART0 as well as SRST_P_UART0 and SRST_S_UART0 for the first UART
> + module.
> + Each clock is assigned an identifier, consumer nodes can use it to specify
> + the clock. All available clock and reset IDs are defined in dt-binding
> + headers.
> +
> +properties:
> + compatible:
> + const: rockchip,rk3528-cru
> +
> + reg:
> + maxItems: 1
> +
> + assigned-clocks: true
> +
> + assigned-clock-rates: true
Drop both, totally redundant.
> +
> + clocks:
> + items:
> + - description: External 24MHz oscillator clock
> + - description: 50MHz clock generated by PHY module
> +
> + clock-names:
> + items:
> + - const: xin24m
> + - const: gmac0
gmac
(unless you have gmac1 here as well but then please add it now)
Best regards,
Krzysztof
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