[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAAhSdy2O7RXv=n+O9kcMVofOWij-kdV9+iFgZoaFkaOuwosu0Q@mail.gmail.com>
Date: Wed, 8 Jan 2025 17:55:25 +0530
From: Anup Patel <anup@...infault.org>
To: Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>
Cc: aou@...s.berkeley.edu, conor+dt@...nel.org, krzk+dt@...nel.org,
linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
palmer@...belt.com, paul.walmsley@...ive.com, robh@...nel.org,
tglx@...utronix.de
Subject: Re: [PATCH v3 1/2] dt-bindings: interrupt-controller: add
risc-v,aplic hart indexes
On Tue, Jan 7, 2025 at 1:29 PM Vladimir Kondratiev
<vladimir.kondratiev@...ileye.com> wrote:
>
> Document optional property "riscv,hart-indexes"
>
> Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>
LGTM.
Reviewed-by: Anup Patel <anup@...infault.org>
Regards,
Anup
> ---
> .../bindings/interrupt-controller/riscv,aplic.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
> index 190a6499c932..bef00521d5da 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml
> @@ -91,6 +91,14 @@ properties:
> Firmware must configure interrupt delegation registers based on
> interrupt delegation list.
>
> + riscv,hart-indexes:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + minItems: 1
> + maxItems: 16384
> + description:
> + A list of hart indexes that APLIC should use to address each hart
> + that is mentioned in the "interrupts-extended"
> +
> dependencies:
> riscv,delegation: [ "riscv,children" ]
>
> --
> 2.43.0
>
Powered by blists - more mailing lists