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Message-ID: <bdf12d3a-dfb9-44f5-b95b-4dd38859b6fe@oss.nxp.com>
Date: Mon, 13 Jan 2025 11:15:22 +0200
From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
To: Frank Li <Frank.li@....com>
Cc: Chester Lin <chester62515@...il.com>, Matthias Brugger
<mbrugger@...e.com>, Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Pengutronix Kernel Team <kernel@...gutronix.de>,
linux-arm-kernel@...ts.infradead.org, imx@...ts.linux.dev,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
NXP S32 Linux <s32@....com>, Christophe Lizzi <clizzi@...hat.com>,
Alberto Ruiz <aruizrui@...hat.com>, Enric Balletbo <eballetb@...hat.com>
Subject: Re: [PATCH v4 1/4] arm64: dts: s32g: add 'I2C' common board support
On 12/20/2024 5:44 PM, Frank Li wrote:
> On Fri, Dec 20, 2024 at 02:39:13PM +0200, Ciprian Costea wrote:
>
Hello Frank,
> Subject is wrong, this patch is not for common board
>
> Simple said: "Add I2C[0..2] support for s32g2 and s32g3"
>
>> From: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
>>
>> On both 'S32G2' and 'S32G3' SoCs there are five i2c controllers available
>> (i2c0-i2c4). Specific S32G2/S32G3 based board 'i2c' dts device support
>> will be added in further commits.
>
> This commit have not touch "based board".
>
> So"Add I2C[0..2] for S32G and S32G3 SoCs commit dts."
>
> Allow only copy subject here for such simple add some nodes.
>
Thanks. I will update accordingly in V5.
>>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@....nxp.com>
>> ---
>> arch/arm64/boot/dts/freescale/s32g2.dtsi | 55 ++++++++++++++++++++++
>> arch/arm64/boot/dts/freescale/s32g3.dtsi | 60 ++++++++++++++++++++++++
>> 2 files changed, 115 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
>> index 7be430b78c83..1a9683c234b7 100644
>> --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
>> @@ -333,6 +333,39 @@ uart1: serial@...cc000 {
>> status = "disabled";
>> };
>>
>> + i2c0: i2c@...e4000 {
>> + compatible = "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x401e4000 0x1000>;
>
> reg should just after compatible.
>
> Frank
>
Ok, I have nothing against this. I will update in V5 as I see now newer
dtsi follow this.
>> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c@...e8000 {
>> + compatible = "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x401e8000 0x1000>;
>> + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c2: i2c@...ec000 {
>> + compatible = "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x401ec000 0x1000>;
>> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> uart2: serial@...bc000 {
>> compatible = "nxp,s32g2-linflexuart",
>> "fsl,s32v234-linflexuart";
>> @@ -341,6 +374,28 @@ uart2: serial@...bc000 {
>> status = "disabled";
>> };
>>
>> + i2c3: i2c@...d8000 {
>> + compatible = "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x402d8000 0x1000>;
>> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c4: i2c@...dc000 {
>> + compatible = "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x402dc000 0x1000>;
>> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> usdhc0: mmc@...f0000 {
>> compatible = "nxp,s32g2-usdhc";
>> reg = <0x402f0000 0x1000>;
>> diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts/freescale/s32g3.dtsi
>> index 6c572ffe37ca..5d28b439906d 100644
>> --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi
>> @@ -390,6 +390,42 @@ uart1: serial@...cc000 {
>> status = "disabled";
>> };
>>
>> + i2c0: i2c@...e4000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x401e4000 0x1000>;
>> + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c1: i2c@...e8000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x401e8000 0x1000>;
>> + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c2: i2c@...ec000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x401ec000 0x1000>;
>> + interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> uart2: serial@...bc000 {
>> compatible = "nxp,s32g3-linflexuart",
>> "fsl,s32v234-linflexuart";
>> @@ -398,6 +434,30 @@ uart2: serial@...bc000 {
>> status = "disabled";
>> };
>>
>> + i2c3: i2c@...d8000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x402d8000 0x1000>;
>> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> + i2c4: i2c@...dc000 {
>> + compatible = "nxp,s32g3-i2c",
>> + "nxp,s32g2-i2c";
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + reg = <0x402dc000 0x1000>;
>> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&clks 40>;
>> + clock-names = "ipg";
>> + status = "disabled";
>> + };
>> +
>> usdhc0: mmc@...f0000 {
>> compatible = "nxp,s32g3-usdhc",
>> "nxp,s32g2-usdhc";
>> --
>> 2.45.2
>>
Best Regards,
Ciprian
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