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Message-ID: <20250114154625.7d82c858@donnerap.manchester.arm.com>
Date: Tue, 14 Jan 2025 15:46:25 +0000
From: Andre Przywara <andre.przywara@....com>
To: Linus Walleij <linus.walleij@...aro.org>
Cc: Parthiban Nallathambi <parthiban@...umiz.com>, Joerg Roedel
<joro@...tes.org>, Will Deacon <will@...nel.org>, Robin Murphy
<robin.murphy@....com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai
<wens@...e.org>, Jernej Skrabec <jernej.skrabec@...il.com>, Samuel Holland
<samuel@...lland.org>, Maxime Ripard <mripard@...nel.org>, Maarten
Lankhorst <maarten.lankhorst@...ux.intel.com>, Thomas Zimmermann
<tzimmermann@...e.de>, David Airlie <airlied@...il.com>, Simona Vetter
<simona@...ll.ch>, Michael Turquette <mturquette@...libre.com>, Stephen
Boyd <sboyd@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>, Vinod Koul
<vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
iommu@...ts.linux.dev, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
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Subject: Re: [PATCH 10/22] pinctrl: sunxi: add missed lvds pins for
a100/a133
On Mon, 13 Jan 2025 15:30:24 +0100
Linus Walleij <linus.walleij@...aro.org> wrote:
> On Fri, Dec 27, 2024 at 12:09 PM Parthiban Nallathambi
> <parthiban@...umiz.com> wrote:
>
> > lvds, lcd, dsi all shares the same GPIO D bank and lvds0
> > data 3 lines and lvds1 pins are missed, add them.
> >
> > Signed-off-by: Parthiban Nallathambi <parthiban@...umiz.com>
>
> Nobody seems to have any objections about this patch and it seems
> technically correct so I just applied it to the pin control tree.
I think Parthiban had troubles with his email server, so not the whole
series was sent out:
https://lore.kernel.org/linux-sunxi/314b6bbe-613e-41a6-955e-50db6e11ef8e@linumiz.com/T/#u
At least that put me off from reviewing it in anger.
I do have a comment on this, will reply in another mail. So can you hold
this patch back still, for now?
Cheers,
Andre
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