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Message-ID: <aFu3fAMa8KPwjPbX@shepard>
Date: Wed, 25 Jun 2025 10:46:52 +0200
From: Paul Kocialkowski <paulk@...-base.io>
To: Parthiban Nallathambi <parthiban@...umiz.com>
Cc: Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Maxime Ripard <mripard@...nel.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Linus Walleij <linus.walleij@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>, iommu@...ts.linux.dev,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, linux-clk@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-phy@...ts.infradead.org
Subject: Re: [PATCH 10/22] pinctrl: sunxi: add missed lvds pins for a100/a133
Hi and thanks for your work!
On Fri 27 Dec 24, 16:37, Parthiban Nallathambi wrote:
> lvds, lcd, dsi all shares the same GPIO D bank and lvds0
> data 3 lines and lvds1 pins are missed, add them.
Would it also make sense to submit device-tree pin definitions here?
Thanks!
Paul
> Signed-off-by: Parthiban Nallathambi <parthiban@...umiz.com>
> ---
> drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
> index df90c75fb3c5..b97de80ae2f3 100644
> --- a/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
> +++ b/drivers/pinctrl/sunxi/pinctrl-sun50i-a100.c
> @@ -256,72 +256,84 @@ static const struct sunxi_desc_pin a100_pins[] = {
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
> + SUNXI_FUNCTION(0x3, "lvds0"), /* D3P */
> SUNXI_FUNCTION(0x4, "dsi0"), /* DP3 */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 8)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
> + SUNXI_FUNCTION(0x3, "lvds0"), /* D3N */
> SUNXI_FUNCTION(0x4, "dsi0"), /* DM3 */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 9)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D0P */
> SUNXI_FUNCTION(0x4, "spi1"), /* CS */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 10)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D0N */
> SUNXI_FUNCTION(0x4, "spi1"), /* CLK */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 11)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D1P */
> SUNXI_FUNCTION(0x4, "spi1"), /* MOSI */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 12)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D1N */
> SUNXI_FUNCTION(0x4, "spi1"), /* MISO */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 13)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D2P */
> SUNXI_FUNCTION(0x4, "uart3"), /* TX */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 14)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D2N */
> SUNXI_FUNCTION(0x4, "uart3"), /* RX */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 15)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* CKP */
> SUNXI_FUNCTION(0x4, "uart3"), /* RTS */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 16)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* CKN */
> SUNXI_FUNCTION(0x4, "uart3"), /* CTS */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 17)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D3P */
> SUNXI_FUNCTION(0x4, "uart4"), /* TX */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 18)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
> SUNXI_FUNCTION(0x0, "gpio_in"),
> SUNXI_FUNCTION(0x1, "gpio_out"),
> SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
> + SUNXI_FUNCTION(0x3, "lvds1"), /* D3N */
> SUNXI_FUNCTION(0x4, "uart4"), /* RX */
> SUNXI_FUNCTION_IRQ_BANK(0x6, 2, 19)),
> SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
>
> --
> 2.39.5
>
--
Paul Kocialkowski,
Independent contractor - sys-base - https://www.sys-base.io/
Free software developer - https://www.paulk.fr/
Expert in multimedia, graphics and embedded hardware support with Linux.
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