[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5F5ACE98B916A290+edc923d2-0ee8-4e41-8e69-f6603ef014fa@linux.starfivetech.com>
Date: Tue, 14 Jan 2025 15:27:33 +0800
From: Hal Feng <hal.feng@...ux.starfivetech.com>
To: E Shattow <e@...eshell.de>, Conor Dooley <conor@...nel.org>,
Emil Renner Berthing <kernel@...il.dk>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt
<palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>
Cc: linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v1 2/5] riscv: dts: starfive: jh7110-common: qspi flash
setting read-delay 2 cycles max 100MHz
On 1/3/2025 3:45 AM, E Shattow wrote:
> Sync qspi flash setting to read-delay=2 and spi-max-frequency 100MHz for
> better compatibility with operating system and downstream boot loader SPL
> secondary program loader.
>
> Signed-off-by: E Shattow <e@...eshell.de>
> ---
> arch/riscv/boot/dts/starfive/jh7110-common.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> index 55c6743100a7..651f9a602226 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-common.dtsi
> @@ -317,8 +317,8 @@ &qspi {
> nor_flash: flash@0 {
> compatible = "jedec,spi-nor";
> reg = <0>;
> - cdns,read-delay = <5>;
> - spi-max-frequency = <12000000>;
> + cdns,read-delay = <2>;
> + spi-max-frequency = <100000000>;
> cdns,tshsl-ns = <1>;
> cdns,tsd2d-ns = <1>;
> cdns,tchsh-ns = <1>;
Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
Powered by blists - more mailing lists