linux-kernel - Re: [REGRESSION] mipsel: no RTC CMOS on the Malta platform in QEMU

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Message-Id: <99de6ed6-2577-42d7-949d-cd5adc740dbb@app.fastmail.com>
Date: Tue, 14 Jan 2025 10:22:24 +0000
From: "Jiaxun Yang" <jiaxun.yang@...goat.com>
To: "Arnd Bergmann" <arnd@...db.de>,
 "Geert Uytterhoeven" <geert@...ux-m68k.org>
Cc: Mateusz Jończyk <mat.jonczyk@...pl>,
 "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
 Linux-Arch <linux-arch@...r.kernel.org>, linux-kernel@...r.kernel.org,
 "Baoquan He" <bhe@...hat.com>,
 "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
 "Alexandre Belloni" <alexandre.belloni@...tlin.com>,
 regressions@...ts.linux.dev
Subject: Re: [REGRESSION] mipsel: no RTC CMOS on the Malta platform in QEMU



在2025年1月14日一月 上午9:59，Arnd Bergmann写道：
[...]
>
> This probably requires calling set_io_port_base() with the
> actual virtual address rather than self-assigning the
> uninitialized mips_io_port_base.
>
> I assume the reason for loongson64 being different from every
> other mips platform is the same as why it calls into the
> logic_pio_register_range() directly. I don't understand that
> code, but it's probably because it has ISA/LPC devices that
> are directly wired to a non-memory-mapped set of registers
> instead of them being behind a PCI bridge like the other
> platforms. The idea of logic_pio is to have a more generic
> way to redirect arbitrary port ranges into bus specific
> function calls, where normal PCI (on non-x86) assumes that
> all I/O ports are mapped into a small contiguous ranges
> of virtual addresses.

That's correct, Loongson systems has a memory-mapped LPC bridge
accessible via MMIO. We are handling registration and mapping
process here.

It also has ioport capable PCI bridge, which will be taken care by
platform code.

I think current problem of logic_pio is it handles creation of
mappings and PIO range registration separately.

Thanks
>
>    Arnd

-- 
- Jiaxun