linux-kernel - Re: [REGRESSION] mipsel: no RTC CMOS on the Malta platform in QEMU

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <599d4ef2-38dc-431f-a65d-c76fc81f02b3@app.fastmail.com>
Date: Tue, 14 Jan 2025 11:30:12 +0100
From: "Arnd Bergmann" <arnd@...db.de>
To: "Jiaxun Yang" <jiaxun.yang@...goat.com>,
 "Geert Uytterhoeven" <geert@...ux-m68k.org>
Cc: Mateusz Jończyk <mat.jonczyk@...pl>,
 "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
 Linux-Arch <linux-arch@...r.kernel.org>, linux-kernel@...r.kernel.org,
 "Baoquan He" <bhe@...hat.com>,
 "Thomas Bogendoerfer" <tsbogend@...ha.franken.de>,
 "Alexandre Belloni" <alexandre.belloni@...tlin.com>,
 regressions@...ts.linux.dev
Subject: Re: [REGRESSION] mipsel: no RTC CMOS on the Malta platform in QEMU

On Tue, Jan 14, 2025, at 11:09, Jiaxun Yang wrote:
> 在2025年1月14日一月 上午8:02，Geert Uytterhoeven写道：
>>
>> Shouldn't arch/mips/include/asm/io.h do
>>
>>     #define PCI_IOBASE mips_io_port_base
>>
>> unconditionally, _before_ including  <asm-generic/io.h>?
>
> The problem here is defining PCI_IOBASE implied use of logic_pio and VM mapped
> io access, which is not true for many MIPS systems...
>

I don't think that was ever meant to be the intention of the
#ifdef in drivers/pci/pci.c. Checking for PCI_IOBASE there
should mainly ensure the default
pci_pio_to_address/pci_address_to_pio don't cause a link
failure on architectures that don't have any memory mapped
PIO at all.

For MIPS platforms that don't need logic_pio because all of
the PIO space is mapped to a fixed physical address, the
default pci_remap_iospace/pci_pio_to_address/pci_address_to_pio/
pci_register_io_range could just be replaced with a trivial
architecture/platform specific version.

    Arnd