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Message-ID: <92b1bd35-28ea-4bf5-82a4-de95f9ffc248@quicinc.com>
Date: Wed, 15 Jan 2025 14:09:48 -0800
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Rob Clark
<robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona
Vetter <simona@...ll.ch>,
Vinod Koul <vkoul@...nel.org>, Konrad Dybcio
<konradybcio@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 02/35] drm/msm/dpu: enable DPU_WB_INPUT_CTRL for DPU 5.x
On 12/13/2024 2:14 PM, Dmitry Baryshkov wrote:
> Several DPU 5.x platforms are supposed to be using DPU_WB_INPUT_CTRL,
> to bind WB and PINGPONG blocks, but they do not. Change those platforms
> to use WB_SM8250_MASK, which includes that bit.
>
> Fixes: 1f5bcc4316b3 ("drm/msm/dpu: enable writeback on SC8108X")
> Fixes: ab2b03d73a66 ("drm/msm/dpu: enable writeback on SM6125")
> Fixes: 47cebb740a83 ("drm/msm/dpu: enable writeback on SM8150")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 2 +-
> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
Change LGTM,
Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
Basically, it means that WB was not validated on those chipsets before
enabling them something which should be more strongly enforced moving
forward.
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