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Message-ID: <20250115114219.00003946@huawei.com>
Date: Wed, 15 Jan 2025 11:42:19 +0000
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: "Bowman, Terry" <terry.bowman@....com>
CC: <linux-cxl@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <nifan.cxl@...il.com>, <dave@...olabs.net>,
<dave.jiang@...el.com>, <alison.schofield@...el.com>,
<vishal.l.verma@...el.com>, <dan.j.williams@...el.com>,
<bhelgaas@...gle.com>, <mahesh@...ux.ibm.com>, <ira.weiny@...el.com>,
<oohall@...il.com>, <Benjamin.Cheatham@....com>, <rrichter@....com>,
<nathan.fontenot@....com>, <Smita.KoralahalliChannabasappa@....com>,
<lukas@...ner.de>, <ming.li@...omail.com>,
<PradeepVineshReddy.Kodamati@....com>, <alucerop@....com>
Subject: Re: [PATCH v5 14/16] cxl/pci: Add trace logging for CXL PCIe Port
RAS errors
> >> diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h
> >> index 8389a94adb1a..681e415ac8f5 100644
> >> --- a/drivers/cxl/core/trace.h
> >> +++ b/drivers/cxl/core/trace.h
> >> @@ -48,6 +48,34 @@
> >> { CXL_RAS_UC_IDE_RX_ERR, "IDE Rx Error" } \
> >> )
> >>
> >> +TRACE_EVENT(cxl_port_aer_uncorrectable_error,
> >> + TP_PROTO(struct device *dev, u32 status, u32 fe, u32 *hl),
> >> + TP_ARGS(dev, status, fe, hl),
> >> + TP_STRUCT__entry(
> >> + __string(devname, dev_name(dev))
> >> + __string(host, dev_name(dev->parent))
> > What is host in this case? Perhaps a comment.
> host is a string initialized with value from dev_name(dev->parent). What
> kind of comment would you like to see here?
What is that parent in practice? A port, an EP, a PCI device?
>
> Regards,
> Terry
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