| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <Z4rwlyysGukXBBw4@google.com>
Date: Sat, 18 Jan 2025 00:06:47 +0000
From: Mingwei Zhang <mizhang@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org,
kernel test robot <oliver.sang@...el.com>
Subject: Re: [PATCH 2/5] KVM: selftests: Only validate counts for
hardware-supported arch events
On Fri, Jan 17, 2025, Sean Christopherson wrote:
> In the Intel PMU counters test, only validate the counts for architectural
> events that are supported in hardware. If an arch event isn't supported,
> the event selector may enable a completely different event, and thus the
> logic for the expected count is bogus.
>
> This fixes test failures on pre-Icelake systems due to the encoding for
> the architectural Top-Down Slots event corresponding to something else
> (at least on the Skylake family of CPUs).
>
> Note, validation relies on *hardware* support, not KVM support and not
> guest support. Architectural events are all about enumerating the event
> selector encoding; lack of enumeration for an architectural event doesn't
> mean the event itself is unsupported, i.e. the event should still count as
> expected even if KVM and/or guest CPUID doesn't enumerate the event as
> being "architectural".
>
> Note #2, it's desirable to _program_ the architectural event encoding even
> if hardware doesn't support the event. The count can't be validated when
> the event is fully enabled, but KVM should still let the guest program the
> event selector, and the PMC shouldn't count if the event is disabled.
>
> Fixes: 4f1bd6b16074 ("KVM: selftests: Test Intel PMU architectural events on gp counters")
> Reported-by: kernel test robot <oliver.sang@...el.com>
> Closes: https://lore.kernel.org/oe-lkp/202501141009.30c629b4-lkp@intel.com
> Debugged-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
> .../selftests/kvm/x86/pmu_counters_test.c | 25 +++++++++++++------
> 1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/tools/testing/selftests/kvm/x86/pmu_counters_test.c b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> index fe7d72fc8a75..8159615ad492 100644
> --- a/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> +++ b/tools/testing/selftests/kvm/x86/pmu_counters_test.c
> @@ -29,6 +29,8 @@
> /* Total number of instructions retired within the measured section. */
> #define NUM_INSNS_RETIRED (NUM_LOOPS * NUM_INSNS_PER_LOOP + NUM_EXTRA_INSNS)
>
> +/* Track which architectural events are supported by hardware. */
> +static uint32_t hardware_pmu_arch_events;
>
> static uint8_t kvm_pmu_version;
> static bool kvm_has_perf_caps;
> @@ -89,6 +91,7 @@ static struct kvm_vm *pmu_vm_create_with_one_vcpu(struct kvm_vcpu **vcpu,
>
> vm = vm_create_with_one_vcpu(vcpu, guest_code);
> sync_global_to_guest(vm, kvm_pmu_version);
> + sync_global_to_guest(vm, hardware_pmu_arch_events);
>
> /*
> * Set PERF_CAPABILITIES before PMU version as KVM disallows enabling
> @@ -152,7 +155,7 @@ static void guest_assert_event_count(uint8_t idx,
> uint64_t count;
>
> count = _rdpmc(pmc);
> - if (!this_pmu_has(event))
> + if (!(hardware_pmu_arch_events & BIT(idx)))
> goto sanity_checks;
>
> switch (idx) {
> @@ -560,7 +563,7 @@ static void test_fixed_counters(uint8_t pmu_version, uint64_t perf_capabilities,
>
> static void test_intel_counters(void)
> {
> - uint8_t nr_arch_events = kvm_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH);
> + uint8_t nr_arch_events = this_cpu_property(X86_PROPERTY_PMU_EBX_BIT_VECTOR_LENGTH);
> uint8_t nr_fixed_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_FIXED_COUNTERS);
> uint8_t nr_gp_counters = kvm_cpu_property(X86_PROPERTY_PMU_NR_GP_COUNTERS);
> uint8_t pmu_version = kvm_cpu_property(X86_PROPERTY_PMU_VERSION);
> @@ -582,18 +585,26 @@ static void test_intel_counters(void)
>
> /*
> * Detect the existence of events that aren't supported by selftests.
> - * This will (obviously) fail any time the kernel adds support for a
> - * new event, but it's worth paying that price to keep the test fresh.
> + * This will (obviously) fail any time hardware adds support for a new
> + * event, but it's worth paying that price to keep the test fresh.
> */
> TEST_ASSERT(nr_arch_events <= NR_INTEL_ARCH_EVENTS,
> "New architectural event(s) detected; please update this test (length = %u, mask = %x)",
> - nr_arch_events, kvm_cpu_property(X86_PROPERTY_PMU_EVENTS_MASK));
> + nr_arch_events, this_cpu_property(X86_PROPERTY_PMU_EVENTS_MASK));
This is where it would make troubles for us (all companies that might be
using the selftest in upstream kernel and having a new hardware). In
this case when we get new hardware, the test will fail in the downstream
kernel. We will have to wait until the fix is ready, and backport it
downstream, re-test it.... It takes lots of extra work.
Perhaps we can just putting nr_arch_events = NR_INTEL_ARCH_EVENTS
if the former is larger than or equal to the latter? So that the "test"
only test what it knows. It does not test what it does not know, i.e.,
it does not "assume" it knows everything. We can always a warning or
info log at the moment. Then expanding the capability of the test should
be added smoothly later by either maintainers of SWEs from CPU vendors
without causing failures.
Thanks.
-Mingwei
>
> /*
> - * Force iterating over known arch events regardless of whether or not
> - * KVM/hardware supports a given event.
> + * Iterate over known arch events irrespective of KVM/hardware support
> + * to verify that KVM doesn't reject programming of events just because
> + * the *architectural* encoding is unsupported. Track which events are
> + * supported in hardware; the guest side will validate supported events
> + * count correctly, even if *enumeration* of the event is unsupported
> + * by KVM and/or isn't exposed to the guest.
> */
> nr_arch_events = max_t(typeof(nr_arch_events), nr_arch_events, NR_INTEL_ARCH_EVENTS);
> + for (i = 0; i < nr_arch_events; i++) {
> + if (this_pmu_has(intel_event_to_feature(i).gp_event))
> + hardware_pmu_arch_events |= BIT(i);
> + }
>
> for (v = 0; v <= max_pmu_version; v++) {
> for (i = 0; i < ARRAY_SIZE(perf_caps); i++) {
> --
> 2.48.0.rc2.279.g1de40edade-goog
>
Powered by blists - more mailing lists