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Message-ID: <alpine.DEB.2.21.2501180101360.27432@angie.orcam.me.uk>
Date: Sat, 18 Jan 2025 01:03:47 +0000 (GMT)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Jiwei Sun <sjiwei@....com>
cc: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>, 
    Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org, 
    LKML <linux-kernel@...r.kernel.org>, helgaas@...nel.org, 
    Lukas Wunner <lukas@...ner.de>, ahuang12@...ovo.com, sunjw10@...ovo.com, 
    jiwei.sun.bj@...com, sunjw10@...look.com
Subject: Re: [PATCH v2 2/2] PCI: reread the Link Control 2 Register before
 using

On Fri, 17 Jan 2025, Jiwei Sun wrote:

> However, within this section of code, lnkctl2 is not modified (after 
> reading from register on line 111) at all and remains 0x5. This results 
> in the condition on line 130 evaluating to 0 (false), which in turn 
> prevents the code from line 132 onward from being executed. The removing
> 2.5GT/s downstream link speed restriction work can not be done.

 It seems like a regression from my original code indeed.

  Maciej

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