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Message-Id: <767F960A-4252-4B22-900B-ABBD7604DF56@gmail.com>
Date: Tue, 21 Jan 2025 09:31:08 +0200
From: Nadav Amit <nadav.amit@...il.com>
To: Rik van Riel <riel@...riel.com>
Cc: the arch/x86 maintainers <x86@...nel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Borislav Petkov <bp@...en8.de>,
peterz@...radead.org,
Dave Hansen <dave.hansen@...ux.intel.com>,
zhengqi.arch@...edance.com,
thomas.lendacky@....com,
kernel-team@...a.com,
"open list:MEMORY MANAGEMENT" <linux-mm@...ck.org>,
Andrew Morton <akpm@...ux-foundation.org>,
jannh@...gle.com,
mhklinux@...look.com,
andrew.cooper3@...rix.com
Subject: Re: [PATCH v6 09/12] x86/mm: enable broadcast TLB invalidation for
multi-threaded processes
> On 21 Jan 2025, at 0:44, Rik van Riel <riel@...riel.com> wrote:
>
>
> If the TLB flush is about a page table change that
> happened after the transition to a global ASID,
> flush_tlb_mm_range() should see that global ASID,
> and flush accordingly.
>
> What am I missing?
I think reasoning needs to be done using memory ordering
arguments using the kernel memory model (which builds on top
of x86 memory model in our case) and when necessary
“happens-before” relations. The fact one CPU sees a write
does not imply another CPU will see the write by itself.
So if there is some memory barriers that would prevent this
scenario, it would be good to mark how they synchronize.
Otherwise, I think the very least “late” TLB-shootdowns should
be respected even if the ASID is already “global”.
I do recommend that you would also check the opposite case
where a CPU that transitioned to global ASID does broadcast
and there is a strangler CPU that has not yet switched to
the global one. While in that case the TLB flush would
eventually take place, there might be a window of time that
it is not (and the page is already freed).
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